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https://gitlab.freedesktop.org/mesa/mesa.git
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72ba6bbbe3
No manual changes here, this is simply running $ ninja -C build/ clang-format Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37224>
502 lines
13 KiB
C
502 lines
13 KiB
C
/*
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* Copyright 2009 Nicolai Haehnle.
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* Copyright 2011 Tom Stellard <tstellar@gmail.com>
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* SPDX-License-Identifier: MIT
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*/
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#include "radeon_regalloc.h"
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#include "radeon_list.h"
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#define VERBOSE 0
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#define DBG(...) \
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do { \
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if (VERBOSE) \
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fprintf(stderr, __VA_ARGS__); \
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} while (0)
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const struct rc_class rc_class_list_vp[] = {
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{
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RC_REG_CLASS_VP_SINGLE,
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4,
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{RC_MASK_X,
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RC_MASK_Y,
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RC_MASK_Z,
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RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_VP_DOUBLE,
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6,
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{RC_MASK_X | RC_MASK_Y,
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RC_MASK_X | RC_MASK_Z,
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RC_MASK_X | RC_MASK_W,
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RC_MASK_Y | RC_MASK_Z,
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RC_MASK_Y | RC_MASK_W,
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RC_MASK_Z | RC_MASK_W},
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},
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{
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RC_REG_CLASS_VP_TRIPLE,
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4,
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{RC_MASK_X | RC_MASK_Y | RC_MASK_Z,
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RC_MASK_X | RC_MASK_Y | RC_MASK_W,
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RC_MASK_X | RC_MASK_Z | RC_MASK_W,
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RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_VP_QUADRUPLE,
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1,
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{RC_MASK_X | RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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}};
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const struct rc_class rc_class_list_fp[] = {
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{
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RC_REG_CLASS_FP_SINGLE,
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3,
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{RC_MASK_X,
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RC_MASK_Y,
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RC_MASK_Z,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_DOUBLE,
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3,
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{RC_MASK_X | RC_MASK_Y,
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RC_MASK_X | RC_MASK_Z,
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RC_MASK_Y | RC_MASK_Z,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_TRIPLE,
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1,
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{RC_MASK_X | RC_MASK_Y | RC_MASK_Z,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_ALPHA,
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1,
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{RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_SINGLE_PLUS_ALPHA,
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3,
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{RC_MASK_X | RC_MASK_W,
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RC_MASK_Y | RC_MASK_W,
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RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_DOUBLE_PLUS_ALPHA,
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3,
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{RC_MASK_X | RC_MASK_Y | RC_MASK_W,
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RC_MASK_X | RC_MASK_Z | RC_MASK_W,
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RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_TRIPLE_PLUS_ALPHA,
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1,
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{RC_MASK_X | RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_X,
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1,
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{RC_MASK_X,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_Y,
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1,
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{RC_MASK_Y,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_Z,
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1,
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{RC_MASK_Z,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_XY,
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1,
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{RC_MASK_X | RC_MASK_Y,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_YZ,
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1,
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{RC_MASK_Y | RC_MASK_Z,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_XZ,
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1,
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{RC_MASK_X | RC_MASK_Z,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_XW,
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1,
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{RC_MASK_X | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_YW,
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1,
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{RC_MASK_Y | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_ZW,
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1,
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{RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_XYW,
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1,
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{RC_MASK_X | RC_MASK_Y | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_YZW,
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1,
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{RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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},
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{
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RC_REG_CLASS_FP_XZW,
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1,
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{RC_MASK_X | RC_MASK_Z | RC_MASK_W,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE,
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RC_MASK_NONE},
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}};
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static void
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print_live_intervals(struct live_intervals *src)
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{
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if (!src || !src->Used) {
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DBG("(null)");
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return;
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}
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DBG("(%i,%i)", src->Start, src->End);
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}
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static int
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overlap_live_intervals(struct live_intervals *a, struct live_intervals *b)
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{
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if (VERBOSE) {
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DBG("overlap_live_intervals: ");
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print_live_intervals(a);
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DBG(" to ");
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print_live_intervals(b);
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DBG("\n");
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}
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if (!a->Used || !b->Used) {
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DBG(" unused interval\n");
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return 0;
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}
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if (a->Start > b->Start) {
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if (a->Start < b->End) {
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DBG(" overlap\n");
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return 1;
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}
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} else if (b->Start > a->Start) {
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if (b->Start < a->End) {
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DBG(" overlap\n");
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return 1;
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}
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} else { /* a->Start == b->Start */
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if (a->Start != a->End && b->Start != b->End) {
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DBG(" overlap\n");
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return 1;
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}
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}
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DBG(" no overlap\n");
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return 0;
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}
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int
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rc_find_class(const struct rc_class *classes, unsigned int writemask,
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unsigned int max_writemask_count)
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{
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unsigned int i;
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for (i = 0; i < RC_REG_CLASS_FP_COUNT; i++) {
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unsigned int j;
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if (classes[i].WritemaskCount > max_writemask_count) {
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continue;
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}
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for (j = 0; j < classes[i].WritemaskCount; j++) {
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if (classes[i].Writemasks[j] == writemask) {
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return i;
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}
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}
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}
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return -1;
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}
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unsigned int
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rc_overlap_live_intervals_array(struct live_intervals *a, struct live_intervals *b)
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{
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unsigned int a_chan, b_chan;
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for (a_chan = 0; a_chan < 4; a_chan++) {
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for (b_chan = 0; b_chan < 4; b_chan++) {
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if (overlap_live_intervals(&a[a_chan], &b[b_chan])) {
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return 1;
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}
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}
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}
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return 0;
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}
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#if VERBOSE
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static void
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print_reg(int reg)
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{
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unsigned int index = reg_get_index(reg);
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unsigned int mask = reg_get_writemask(reg);
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fprintf(stderr, "Temp[%u].%c%c%c%c", index, mask & RC_MASK_X ? 'x' : '_',
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mask & RC_MASK_Y ? 'y' : '_', mask & RC_MASK_Z ? 'z' : '_',
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mask & RC_MASK_W ? 'w' : '_');
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}
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#endif
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static void
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add_register_conflicts(struct ra_regs *regs, unsigned int max_temp_regs)
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{
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unsigned int index, a_mask, b_mask;
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for (index = 0; index < max_temp_regs; index++) {
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for (a_mask = 1; a_mask <= RC_MASK_XYZW; a_mask++) {
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for (b_mask = a_mask + 1; b_mask <= RC_MASK_XYZW; b_mask++) {
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if (a_mask & b_mask) {
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ra_add_reg_conflict(regs, get_reg_id(index, a_mask), get_reg_id(index, b_mask));
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}
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}
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}
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}
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}
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void
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rc_build_interference_graph(struct ra_graph *graph, struct rc_list *variables)
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{
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unsigned node_index;
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struct rc_list *var_ptr;
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/* Build the interference graph */
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for (var_ptr = variables, node_index = 0; var_ptr; var_ptr = var_ptr->Next, node_index++) {
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struct rc_list *a, *b;
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unsigned int b_index;
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for (a = var_ptr, b = var_ptr->Next, b_index = node_index + 1; b; b = b->Next, b_index++) {
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struct rc_variable *var_a = a->Item;
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while (var_a) {
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struct rc_variable *var_b = b->Item;
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while (var_b) {
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if (rc_overlap_live_intervals_array(var_a->Live, var_b->Live)) {
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ra_add_node_interference(graph, node_index, b_index);
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}
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var_b = var_b->Friend;
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}
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var_a = var_a->Friend;
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}
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}
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}
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}
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void
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rc_init_regalloc_state(struct rc_regalloc_state *s, enum rc_program_type prog)
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{
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unsigned i, j, index, class_count, max_temps;
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unsigned **ra_q_values;
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/* Pre-computed q values. This array describes the maximum number of
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* a class's [row] registers that are in conflict with a single
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* register from another class [column].
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*
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* For example:
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* q_values[0][2] is 3, because a register from class 2
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* (RC_REG_CLASS_FP_TRIPLE) may conflict with at most 3 registers from
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* class 0 (RC_REG_CLASS_FP_SINGLE) e.g. T0.xyz conflicts with T0.x, T0.y,
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* and T0.z.
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*
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* q_values[2][0] is 1, because a register from class 0
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* (RC_REG_CLASS_FP_SINGLE) may conflict with at most 1 register from
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* class 2 (RC_REG_CLASS_FP_TRIPLE) e.g. T0.x conflicts with T0.xyz
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*
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* The q values for each register class [row] will never be greater
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* than the maximum number of writemask combinations for that class.
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*
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* For example:
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*
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* Class 2 (RC_REG_CLASS_FP_TRIPLE) only has 1 writemask combination,
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* so no value in q_values[2][0..RC_REG_CLASS_FP_COUNT] will be greater
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* than 1.
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*/
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const unsigned q_values_fp[RC_REG_CLASS_FP_COUNT][RC_REG_CLASS_FP_COUNT] = {
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{1, 2, 3, 0, 1, 2, 3, 1, 1, 1, 2, 2, 2, 1, 1, 1, 2, 2, 2},
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{2, 3, 3, 0, 2, 3, 3, 2, 2, 2, 3, 3, 3, 2, 2, 2, 3, 3, 3},
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{1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
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{0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1},
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{1, 2, 3, 3, 3, 3, 3, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 3},
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{2, 3, 3, 3, 3, 3, 3, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3},
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{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
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{1, 1, 1, 0, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1},
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{1, 1, 1, 0, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0},
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{1, 1, 1, 0, 1, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, 1},
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{1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 1, 1},
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{1, 1, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1},
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{1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1},
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{1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1},
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{1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1},
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{1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1},
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{1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1},
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{1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
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{1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}};
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const unsigned q_values_vp[RC_REG_CLASS_VP_COUNT][RC_REG_CLASS_VP_COUNT] = {{1, 2, 3, 4},
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{3, 5, 6, 6},
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{3, 4, 4, 4},
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{1, 1, 1, 1}};
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if (prog == RC_FRAGMENT_PROGRAM) {
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s->class_list = rc_class_list_fp;
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class_count = RC_REG_CLASS_FP_COUNT;
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max_temps = R500_PFS_NUM_TEMP_REGS;
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} else {
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s->class_list = rc_class_list_vp;
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class_count = RC_REG_CLASS_VP_COUNT;
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max_temps = R300_VS_MAX_TEMPS;
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}
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/* Allocate the main ra data structure */
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s->regs = ra_alloc_reg_set(NULL, max_temps * RC_MASK_XYZW, true);
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/* Create the register classes */
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for (i = 0; i < class_count; i++) {
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const struct rc_class *class = &s->class_list[i];
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s->classes[class->ID] = ra_alloc_reg_class(s->regs);
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/* Assign registers to the classes */
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for (index = 0; index < max_temps; index++) {
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for (j = 0; j < class->WritemaskCount; j++) {
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int reg_id = get_reg_id(index, class->Writemasks[j]);
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ra_class_add_reg(s->classes[class->ID], reg_id);
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}
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}
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}
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/* Set the q values. The q_values array is indexed based on
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* the rc_reg_class ID (RC_REG_CLASS_FP_*) which might be
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* different than the ID assigned to that class by ra.
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* This why we need to manually construct this list.
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*/
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ra_q_values = MALLOC(class_count * sizeof(unsigned *));
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for (i = 0; i < class_count; i++) {
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ra_q_values[i] = MALLOC(class_count * sizeof(unsigned));
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for (j = 0; j < class_count; j++) {
|
|
if (prog == RC_FRAGMENT_PROGRAM)
|
|
ra_q_values[i][j] = q_values_fp[i][j];
|
|
else
|
|
ra_q_values[i][j] = q_values_vp[i][j];
|
|
}
|
|
}
|
|
|
|
/* Add register conflicts */
|
|
add_register_conflicts(s->regs, max_temps);
|
|
|
|
ra_set_finalize(s->regs, ra_q_values);
|
|
|
|
for (i = 0; i < class_count; i++) {
|
|
FREE(ra_q_values[i]);
|
|
}
|
|
FREE(ra_q_values);
|
|
}
|
|
|
|
void
|
|
rc_destroy_regalloc_state(struct rc_regalloc_state *s)
|
|
{
|
|
ralloc_free(s->regs);
|
|
}
|