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agx: Handle 32-bit gl_FragCoord.zw

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The coefficient register is 16-bit so our builder will make the iter 16-bit too
(maybe not the best design...), force fp32 to match the NIR intrinsic.

Fixes glsl-fs-fragcoord-zw-ortho

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
This commit is contained in:
Alyssa Rosenzweig 2022-11-25 19:46:15 -05:00 • committed by Marge Bot
parent eb4187b02d
commit 7108619c0d
1 changed files with 5 additions and 2 deletions
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7
src/asahi/compiler/agx_compile.c
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@ -682,8 +682,9 @@ agx_emit_load_frag_coord(agx_builder *b, agx_index dst, nir_intrinsic_instr *ins
agx_index dests[4] = { agx_null() };
u_foreach_bit(i, nir_ssa_def_components_read(&instr->dest.ssa)) {
agx_index fp32 = agx_temp(b->shader, AGX_SIZE_32);
if (i < 2) {
agx_index fp32 = agx_temp(b->shader, AGX_SIZE_32);
agx_convert_to(b, fp32, agx_immediate(AGX_CONVERT_U32_TO_F),
agx_get_sr(b, 32, AGX_SR_THREAD_POSITION_IN_GRID_X + i),
AGX_ROUND_RTE);
@ -691,7 +692,9 @@ agx_emit_load_frag_coord(agx_builder *b, agx_index dst, nir_intrinsic_instr *ins
dests[i] = agx_fadd(b, fp32, agx_immediate_f(0.5f));
} else {
agx_index cf = agx_get_cf(b->shader, true, false, VARYING_SLOT_POS, i, 1);
dests[i] = agx_iter(b, cf, agx_null(), 1, false);
dests[i] = fp32;
agx_iter_to(b, fp32, cf, agx_null(), 1, false);
}
}