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panvk: Remove pan_optimize_nir call

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The shader will be optimized a few passes later in preprocess, this way
we can have the same pipeline as in Gallium

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40924>
This commit is contained in:
Lorenzo Rossi 2026-04-13 10:49:37 +02:00 • committed by Marge Bot
parent 39f54ddea2
commit 6f05b27b9a
5 changed files with 2 additions and 22 deletions
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1
src/panfrost/compiler/bifrost/bifrost_compile.h
View file

@ -63,7 +63,6 @@ bifrost_precompiled_kernel_prepare_push_uniforms(
}
void bifrost_preprocess_nir(nir_shader *nir, uint64_t gpu_id);
void bifrost_optimize_nir(nir_shader *nir, uint64_t gpu_id);
void bifrost_postprocess_nir(nir_shader *nir,
const struct pan_compile_inputs *inputs,
struct pan_shader_info *info);

6
src/panfrost/compiler/bifrost/bifrost_nir.c
View file

@ -259,12 +259,6 @@ bi_optimize_loop_nir(nir_shader *nir, uint64_t gpu_id, bool allow_copies)
NIR_PASS(_, nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
}
void
bifrost_optimize_nir(nir_shader *nir, uint64_t gpu_id)
{
bi_optimize_loop_nir(nir, gpu_id, true);
}
static void
bi_optimize_nir(nir_shader *nir, uint64_t gpu_id,
nir_variable_mode robust_modes)

7
src/panfrost/compiler/pan_compiler.c
View file

@ -83,13 +83,6 @@ pan_preprocess_nir(nir_shader *nir, uint64_t gpu_id)
NIR_PASS(_, nir, nir_lower_tex, &lower_tex_options);
}
void
pan_optimize_nir(nir_shader *nir, uint64_t gpu_id)
{
assert(pan_arch(gpu_id) >= 6);
bifrost_optimize_nir(nir, gpu_id);
}
void
pan_postprocess_nir(nir_shader *nir, const struct pan_compile_inputs *inputs,
struct pan_shader_info *info)

5
src/panfrost/compiler/pan_compiler.h
View file

@ -58,19 +58,18 @@ struct pan_compile_inputs {
};
/* Every panfrost compilation pipeline should adhere to:
* 1. Driver-specific early lowering + pan_optimize_nir() (optional)
* 1. Driver-specific early lowering
* 2. pan_preprocess_nir()
* 3. Descriptor lowering
* 4. pan_postprocess_nir()
* 5. Inline sysvals
* 5. pan_shader_compile()
* 6. pan_shader_compile()
* ONLY SYSVAL LOWERING is allowed between postprocess and shader_compile.
* Driver-specific lowerings should be either BEFORE preprocess or BETWEEN
* preprocess and postprocess. Any code except sysval inlining put after
* postprocess WILL BE NAKed.
*/
void pan_preprocess_nir(nir_shader *nir, uint64_t gpu_id);
void pan_optimize_nir(nir_shader *nir, uint64_t gpu_id);
void pan_postprocess_nir(nir_shader *nir,
const struct pan_compile_inputs *inputs,
struct pan_shader_info *info);

5
src/panfrost/vulkan/panvk_vX_shader.c
View file

@ -497,11 +497,6 @@ panvk_preprocess_nir(struct vk_physical_device *vk_pdev,
if (nir->info.stage == MESA_SHADER_FRAGMENT)
NIR_PASS(_, nir, nir_lower_wpos_center);
pan_optimize_nir(nir, pdev->kmod.dev->props.gpu_id);
NIR_PASS(_, nir, nir_split_var_copies);
NIR_PASS(_, nir, nir_lower_var_copies);
assert(pdev->kmod.dev->props.shader_present != 0);
uint64_t core_max_id =
util_last_bit(pdev->kmod.dev->props.shader_present) - 1;