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panvk: Put the sysval and push const UBOs at fixed indices
In theory, this may cost us a tiny bit of descriptor space but in practice, given that the viewport transform is a sysval, we'll always need it for 3D and given that SSBO pointers live there, we'll basically always need it for compute. It also makes a lot of things simpler. We're about to start using the sysval UBO directly in our descriptor set code and knowing the index up-front is really nice. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16276>
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parent
744b977963
commit
6d15d65e19
6 changed files with 34 additions and 37 deletions
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@ -206,9 +206,6 @@ panvk_CreatePipelineLayout(VkDevice _device,
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layout->push_constants.size);
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}
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if (layout->push_constants.size)
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layout->push_constants.ubo_idx = ubo_idx++;
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layout->num_samplers = sampler_idx;
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layout->num_textures = tex_idx;
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layout->num_ubos = ubo_idx;
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@ -106,6 +106,10 @@ typedef uint32_t xcb_window_t;
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#define NUM_DEPTH_CLEAR_PIPELINES 3
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#define PANVK_SYSVAL_UBO_INDEX 0
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#define PANVK_PUSH_CONST_UBO_INDEX 1
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#define PANVK_NUM_BUILTIN_UBOS 2
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#define panvk_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
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void
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@ -458,7 +462,6 @@ struct panvk_pipeline_layout {
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struct {
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uint32_t size;
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unsigned ubo_idx;
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} push_constants;
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struct {
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@ -389,11 +389,24 @@ panvk_per_arch(emit_ubos)(const struct panvk_pipeline *pipeline,
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{
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struct mali_uniform_buffer_packed *ubos = descs;
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panvk_per_arch(emit_ubo)(state->sysvals_ptr,
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sizeof(state->sysvals),
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&ubos[PANVK_SYSVAL_UBO_INDEX]);
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if (pipeline->layout->push_constants.size) {
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panvk_per_arch(emit_ubo)(state->push_constants,
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ALIGN_POT(pipeline->layout->push_constants.size, 16),
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&ubos[PANVK_PUSH_CONST_UBO_INDEX]);
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} else {
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memset(&ubos[PANVK_PUSH_CONST_UBO_INDEX], 0, sizeof(*ubos));
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}
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for (unsigned i = 0; i < ARRAY_SIZE(state->sets); i++) {
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const struct panvk_descriptor_set_layout *set_layout =
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pipeline->layout->sets[i].layout;
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const struct panvk_descriptor_set *set = state->sets[i];
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unsigned offset = pipeline->layout->sets[i].ubo_offset;
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unsigned offset = PANVK_NUM_BUILTIN_UBOS +
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pipeline->layout->sets[i].ubo_offset;
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if (!set_layout)
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continue;
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@ -405,7 +418,7 @@ panvk_per_arch(emit_ubos)(const struct panvk_pipeline *pipeline,
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}
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}
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unsigned offset = pipeline->layout->num_ubos;
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unsigned offset = PANVK_NUM_BUILTIN_UBOS + pipeline->layout->num_ubos;
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for (unsigned i = 0; i < pipeline->layout->num_dyn_ubos; i++) {
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const struct panvk_buffer_desc *bdesc = &state->dyn.ubos[i];
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mali_ptr address = panvk_buffer_gpu_ptr(bdesc->buffer, bdesc->offset);
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@ -417,18 +430,6 @@ panvk_per_arch(emit_ubos)(const struct panvk_pipeline *pipeline,
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else
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memset(&ubos[offset + i], 0, sizeof(*ubos));
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}
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for (unsigned i = 0; i < ARRAY_SIZE(pipeline->sysvals); i++) {
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panvk_per_arch(emit_ubo)(state->sysvals_ptr,
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sizeof(state->sysvals),
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&ubos[pipeline->sysvals[i].ubo_idx]);
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}
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if (pipeline->layout->push_constants.size) {
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panvk_per_arch(emit_ubo)(state->push_constants,
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ALIGN_POT(pipeline->layout->push_constants.size, 16),
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&ubos[pipeline->layout->push_constants.ubo_idx]);
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}
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}
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void
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@ -135,11 +135,15 @@ lower_vulkan_resource_index(nir_builder *b, nir_intrinsic_instr *intr,
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switch (binding_layout->type) {
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case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
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base = binding_layout->ubo_idx + ctx->layout->sets[set].ubo_offset;
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base = PANVK_NUM_BUILTIN_UBOS +
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ctx->layout->sets[set].ubo_offset +
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binding_layout->ubo_idx;
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break;
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case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
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base = binding_layout->dyn_ubo_idx + ctx->layout->num_ubos +
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ctx->layout->sets[set].dyn_ubo_offset;
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base = PANVK_NUM_BUILTIN_UBOS +
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ctx->layout->sets[set].dyn_ubo_offset +
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ctx->layout->num_ubos +
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binding_layout->dyn_ubo_idx;
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break;
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case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
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base = binding_layout->ssbo_idx + ctx->layout->sets[set].ssbo_offset;
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@ -125,8 +125,6 @@ panvk_pipeline_builder_compile_shaders(struct panvk_pipeline_builder *builder,
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}
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/* compile shaders in reverse order */
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unsigned sysval_ubo = builder->layout->num_ubos + builder->layout->num_dyn_ubos;
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for (gl_shader_stage stage = MESA_SHADER_STAGES - 1;
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stage > MESA_SHADER_NONE; stage--) {
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const VkPipelineShaderStageCreateInfo *stage_info = stage_infos[stage];
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@ -136,16 +134,14 @@ panvk_pipeline_builder_compile_shaders(struct panvk_pipeline_builder *builder,
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struct panvk_shader *shader;
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shader = panvk_per_arch(shader_create)(builder->device, stage, stage_info,
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builder->layout, sysval_ubo,
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builder->layout,
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PANVK_SYSVAL_UBO_INDEX,
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&pipeline->blend.state,
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panvk_pipeline_static_state(pipeline,
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VK_DYNAMIC_STATE_BLEND_CONSTANTS),
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builder->alloc);
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if (!shader)
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return VK_ERROR_OUT_OF_HOST_MEMORY;
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if (shader->info.sysvals.sysval_count)
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sysval_ubo++;
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builder->shaders[stage] = shader;
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builder->shader_total_size = ALIGN_POT(builder->shader_total_size, 128);
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@ -319,11 +315,9 @@ panvk_pipeline_builder_init_shaders(struct panvk_pipeline_builder *builder,
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}
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}
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pipeline->num_ubos = builder->layout->num_ubos + builder->layout->num_dyn_ubos;
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for (unsigned i = 0; i < ARRAY_SIZE(pipeline->sysvals); i++) {
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if (pipeline->sysvals[i].ids.sysval_count)
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pipeline->num_ubos = MAX2(pipeline->num_ubos, pipeline->sysvals[i].ubo_idx + 1);
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}
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pipeline->num_ubos = PANVK_NUM_BUILTIN_UBOS +
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builder->layout->num_ubos +
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builder->layout->num_dyn_ubos;
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}
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@ -295,13 +295,11 @@ panvk_lower_load_push_constant(nir_builder *b, nir_instr *instr, void *data)
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if (intr->intrinsic != nir_intrinsic_load_push_constant)
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return false;
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const struct panvk_pipeline_layout *layout = data;
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b->cursor = nir_before_instr(instr);
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nir_ssa_def *ubo_load =
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nir_load_ubo(b, nir_dest_num_components(intr->dest),
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nir_dest_bit_size(intr->dest),
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nir_imm_int(b, layout->push_constants.ubo_idx),
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nir_imm_int(b, PANVK_PUSH_CONST_UBO_INDEX),
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intr->src[0].ssa,
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.align_mul = nir_dest_bit_size(intr->dest) / 8,
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.align_offset = 0,
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@ -454,8 +452,8 @@ panvk_per_arch(shader_create)(struct panvk_device *dev,
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sizeof(fixed_sysvals)) == 0);
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/* Patch the descriptor count */
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shader->info.ubo_count =
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shader->info.sysvals.sysval_count ? sysval_ubo + 1 : layout->num_ubos;
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shader->info.ubo_count = PANVK_NUM_BUILTIN_UBOS +
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layout->num_ubos + layout->num_dyn_ubos;
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shader->info.sampler_count = layout->num_samplers;
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shader->info.texture_count = layout->num_textures;
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if (shader->has_img_access)
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