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radeonsi: never set DISABLE_WR_CONFIRM for CP DMA clears and copies
Only prefetches set it. Unsynchronized clears and copies shouldn't set it because syncing later wouldn't wait for the writes. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
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1 changed files with 0 additions and 6 deletions
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@ -70,12 +70,6 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui
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/* Sync flags. */
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if (flags & CP_DMA_SYNC)
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header |= S_411_CP_SYNC(1);
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else {
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if (sctx->chip_class >= GFX9)
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command |= S_414_DISABLE_WR_CONFIRM_GFX9(1);
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else
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command |= S_414_DISABLE_WR_CONFIRM_GFX6(1);
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}
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if (flags & CP_DMA_RAW_WAIT)
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command |= S_414_RAW_WAIT(1);
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