From 69ff9c16bbbc5d549606cb9f93550034893d394a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 19 Mar 2021 18:48:04 -0400 Subject: [PATCH] radeonsi: never set DISABLE_WR_CONFIRM for CP DMA clears and copies Only prefetches set it. Unsynchronized clears and copies shouldn't set it because syncing later wouldn't wait for the writes. Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_cp_dma.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index 5cd30e50b60..5c1cd39e9b6 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -70,12 +70,6 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui /* Sync flags. */ if (flags & CP_DMA_SYNC) header |= S_411_CP_SYNC(1); - else { - if (sctx->chip_class >= GFX9) - command |= S_414_DISABLE_WR_CONFIRM_GFX9(1); - else - command |= S_414_DISABLE_WR_CONFIRM_GFX6(1); - } if (flags & CP_DMA_RAW_WAIT) command |= S_414_RAW_WAIT(1);