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Revert "intel/fs: Move the scalar-region conversion to the generator."
This reverts commitc0504569ea. Now that we're doing interpolation lowering in NIR, we can continue to stride the FS input registers directly in the brw_fs_nir code like we did before. This fixes SIMD32 fragment shaders which broke because lower_simd_width depended on the 0 stride to split PLN instructions correctly. Reviewed-by: Francisco Jerez <currojerez@riseup.net> (cherry picked from commitd15fe8ca82)
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48f78dfce2
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4 changed files with 5 additions and 5 deletions
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@ -1192,7 +1192,7 @@ fs_visitor::emit_fragcoord_interpolation(fs_reg wpos)
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} else {
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bld.emit(FS_OPCODE_LINTERP, wpos,
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this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL],
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interp_reg(VARYING_SLOT_POS, 2));
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component(interp_reg(VARYING_SLOT_POS, 2), 0));
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}
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wpos = offset(wpos, bld, 1);
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@ -818,7 +818,7 @@ fs_generator::generate_linterp(fs_inst *inst,
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*/
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struct brw_reg delta_x = src[0];
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struct brw_reg delta_y = offset(src[0], inst->exec_size / 8);
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struct brw_reg interp = stride(src[1], 0, 1, 0);
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struct brw_reg interp = src[1];
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brw_inst *i[2];
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/* fs_visitor::lower_linterp() will do the lowering to MAD instructions for
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@ -3619,8 +3619,8 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld,
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for (unsigned int i = 0; i < instr->num_components; i++) {
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fs_reg interp =
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interp_reg(nir_intrinsic_base(instr),
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nir_intrinsic_component(instr) + i);
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component(interp_reg(nir_intrinsic_base(instr),
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nir_intrinsic_component(instr) + i), 0);
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interp.type = BRW_REGISTER_TYPE_F;
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dest.type = BRW_REGISTER_TYPE_F;
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@ -194,7 +194,7 @@ fs_visitor::emit_interpolation_setup_gen4()
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*/
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this->wpos_w = vgrf(glsl_type::float_type);
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abld.emit(FS_OPCODE_LINTERP, wpos_w, delta_xy,
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interp_reg(VARYING_SLOT_POS, 3));
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component(interp_reg(VARYING_SLOT_POS, 3), 0));
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/* Compute the pixel 1/W value from wpos.w. */
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this->pixel_w = vgrf(glsl_type::float_type);
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abld.emit(SHADER_OPCODE_RCP, this->pixel_w, wpos_w);
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