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drivers/svga, winsys/svga/drm: Thread through timeout for fence_finish

Browse source 
The timeout parameter is required to implement
EGL_ANDROID_native_fence_sync.

v2
* Replaced default timeout from 0 to PIPE_TIMEOUT_INFINITE
* Add more documentation to the new timeout parameter

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
This commit is contained in:
Sinclair Yeh 2017-05-03 11:48:25 -07:00 • committed by Brian Paul
parent 9ee86d6db7
commit 65175df601
7 changed files with 18 additions and 8 deletions
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9
src/gallium/drivers/svga/svga_pipe_query.c
View file

@ -191,7 +191,8 @@ get_query_result_vgpu9(struct svga_context *svga, struct svga_query *sq,
if (state == SVGA3D_QUERYSTATE_PENDING) {
if (!wait)
return FALSE;
sws->fence_finish(sws, sq->fence, SVGA_FENCE_FLAG_QUERY);
sws->fence_finish(sws, sq->fence, PIPE_TIMEOUT_INFINITE,
SVGA_FENCE_FLAG_QUERY);
state = sq->queryResult->state;
}
@ -651,7 +652,8 @@ get_query_result_vgpu10(struct svga_context *svga, struct svga_query *sq,
queryState == SVGA3D_QUERYSTATE_NEW) {
if (!wait)
return FALSE;
sws->fence_finish(sws, sq->fence, SVGA_FENCE_FLAG_QUERY);
sws->fence_finish(sws, sq->fence, PIPE_TIMEOUT_INFINITE,
SVGA_FENCE_FLAG_QUERY);
sws->query_get_result(sws, sq->gb_query, sq->offset, &queryState, result, resultLen);
}
@ -1230,7 +1232,8 @@ svga_render_condition(struct pipe_context *pipe, struct pipe_query *q,
if ((mode == PIPE_RENDER_COND_WAIT ||
mode == PIPE_RENDER_COND_BY_REGION_WAIT) && sq->fence) {
sws->fence_finish(sws, sq->fence, SVGA_FENCE_FLAG_QUERY);
sws->fence_finish(sws, sq->fence, PIPE_TIMEOUT_INFINITE,
SVGA_FENCE_FLAG_QUERY);
}
}
/*

4
src/gallium/drivers/svga/svga_resource_texture.c
View file

@ -128,7 +128,7 @@ svga_transfer_dma(struct svga_context *svga,
if (transfer == SVGA3D_READ_HOST_VRAM) {
svga_context_flush(svga, &fence);
sws->fence_finish(sws, fence, 0);
sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
sws->fence_reference(sws, &fence, NULL);
}
}
@ -187,7 +187,7 @@ svga_transfer_dma(struct svga_context *svga,
if (transfer == SVGA3D_READ_HOST_VRAM) {
svga_context_flush(svga, &fence);
sws->fence_finish(sws, fence, 0);
sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
assert(hw);

2
src/gallium/drivers/svga/svga_screen.c
View file

@ -854,7 +854,7 @@ svga_fence_finish(struct pipe_screen *screen,
SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
__FUNCTION__, fence);
retVal = sws->fence_finish(sws, fence, 0) == 0;
retVal = sws->fence_finish(sws, fence, timeout, 0) == 0;
}
SVGA_STATS_TIME_POP(sws);

3
src/gallium/drivers/svga/svga_winsys.h
View file

@ -625,11 +625,14 @@ struct svga_winsys_screen
/**
* Wait for the fence to finish.
* \param timeout in nanoseconds (may be PIPE_TIMEOUT_INFINITE).
* 0 to return immediately, if the API suports it.
* \param flags driver-specific meaning
* \return zero on success.
*/
int (*fence_finish)( struct svga_winsys_screen *sws,
struct pipe_fence_handle *fence,
uint64_t timeout,
unsigned flag );

4
src/gallium/winsys/svga/drm/vmw_fence.c
View file

@ -300,6 +300,7 @@ vmw_fence_signalled(struct vmw_winsys_screen *vws,
*
* @vws: Pointer to the winsys screen.
* @fence: Handle to the fence object.
* @timeout: How long to wait before timing out.
* @flag: Fence flags to wait for. If the fence object can't signal
* a flag, it is assumed to be already signaled.
*
@ -308,6 +309,7 @@ vmw_fence_signalled(struct vmw_winsys_screen *vws,
int
vmw_fence_finish(struct vmw_winsys_screen *vws,
struct pipe_fence_handle *fence,
uint64_t timeout,
unsigned flag)
{
struct vmw_fence *vfence;
@ -383,7 +385,7 @@ vmw_fence_ops_fence_finish(struct pb_fence_ops *ops,
{
struct vmw_winsys_screen *vws = vmw_fence_ops(ops)->vws;
return vmw_fence_finish(vws, fence, flag);
return vmw_fence_finish(vws, fence, PIPE_TIMEOUT_INFINITE, flag);
}

1
src/gallium/winsys/svga/drm/vmw_fence.h
View file

@ -43,6 +43,7 @@ vmw_fence_create(struct pb_fence_ops *fence_ops,
int
vmw_fence_finish(struct vmw_winsys_screen *vws,
struct pipe_fence_handle *fence,
uint64_t timeout,
unsigned flag);
int
vmw_fence_signalled(struct vmw_winsys_screen *vws,

3
src/gallium/winsys/svga/drm/vmw_screen_svga.c
View file

@ -123,11 +123,12 @@ vmw_svga_winsys_fence_signalled(struct svga_winsys_screen *sws,
static int
vmw_svga_winsys_fence_finish(struct svga_winsys_screen *sws,
struct pipe_fence_handle *fence,
uint64_t timeout,
unsigned flag)
{
struct vmw_winsys_screen *vws = vmw_winsys_screen(sws);
return vmw_fence_finish(vws, fence, flag);
return vmw_fence_finish(vws, fence, timeout, flag);
}