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radv: set missing SPI_SHADER_PGM_xxx registers on GFX11

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Found by inspection.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20054>
This commit is contained in:
Samuel Pitoiset 2022-11-29 08:59:23 +01:00 • committed by Marge Bot
parent d0342e28b3
commit 62715a6d03
1 changed files with 6 additions and 3 deletions
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9
src/amd/vulkan/si_cmd_buffer.c
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@ -352,12 +352,15 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
if (physical_device->rad_info.gfx_level >= GFX10 &&
physical_device->rad_info.gfx_level < GFX11) {
/* Logical CUs 16 - 31 */
ac_set_reg_cu_en(cs, R_00B404_SPI_SHADER_PGM_RSRC4_HS, S_00B404_CU_EN(0xffff),
C_00B404_CU_EN, 16, &physical_device->rad_info,
(void*)gfx10_set_sh_reg_idx3);
ac_set_reg_cu_en(cs, R_00B104_SPI_SHADER_PGM_RSRC4_VS, S_00B104_CU_EN(0xffff),
C_00B104_CU_EN, 16, &physical_device->rad_info,
(void*)gfx10_set_sh_reg_idx3);
}
if (physical_device->rad_info.gfx_level >= GFX10) {
ac_set_reg_cu_en(cs, R_00B404_SPI_SHADER_PGM_RSRC4_HS, S_00B404_CU_EN(0xffff),
C_00B404_CU_EN, 16, &physical_device->rad_info,
(void*)gfx10_set_sh_reg_idx3);
ac_set_reg_cu_en(cs, R_00B004_SPI_SHADER_PGM_RSRC4_PS, S_00B004_CU_EN(cu_mask_ps >> 16),
C_00B004_CU_EN, 16, &physical_device->rad_info,
(void*)gfx10_set_sh_reg_idx3);