freedreno/ir3: fix small RA bug

Normally the offset in the group would be the same, but not always.  For
example, in a sam(w) which only writes the 4th component.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Rob Clark 2016-04-22 18:39:10 -04:00
parent adf795432f
commit 610837fb98

View file

@ -469,7 +469,8 @@ get_definer(struct ir3_ra_ctx *ctx, struct ir3_instruction *instr,
*sz = MAX2(*sz, dsz);
/* Fanout's are grouped, so *off should already valid */
debug_assert(instr->opc == OPC_META_FO);
*off = MAX2(*off, instr->fo.off);
d = dd;
}