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ac/gpu_info: query the PRT workaround control bit from libdrm

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libdrm splits the HIGH address space in two equal parts for GPUs that
are affected by the SMEM loads with NULL PRT page.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38698>
This commit is contained in:
Samuel Pitoiset 2026-04-10 18:21:12 +02:00 • committed by Marge Bot
parent 978605fd06
commit 60b406e233
3 changed files with 14 additions and 0 deletions
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12
src/amd/common/ac_gpu_info.c
View file

@ -1734,6 +1734,18 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
&info->pa_sc_raster_config_1, &info->se_tile_repeat);
}
if (info->compiler_info.has_smem_with_null_prt_bug) {
/* Query the PRT control bit that determines whether a VA is in the
* "LOW" or "HIGH" address space. This is needed to implement the SMEM
* with NULL PRT workaround.
*/
r = ac_drm_query_sw_info(dev, amdgpu_sw_info_address_prt_wa_control_bit, &info->address_prt_wa_control_bit);
if (r) {
fprintf(stderr, "amdgpu: amdgpu_query_sw_info(amdgpu_sw_info_address_prt_wa_control_bit) failed.\n");
return AC_QUERY_GPU_INFO_FAIL;
}
}
const char *ib_filename = debug_get_option("AMD_PARSE_IB", NULL);
if (ib_filename) {
FILE *f = fopen(ib_filename, "r");

1
src/amd/common/ac_gpu_info.h
View file

@ -396,6 +396,7 @@ struct radeon_info {
bool has_trap_handler_support;
bool kernel_has_modifiers;
uint32_t userq_ip_mask; /* AMD_IP_* bits */
uint8_t address_prt_wa_control_bit;
/* If the kernel driver uses CU reservation for high priority compute on gfx10+, it programs
* a global CU mask in the hw that is AND'ed with CU_EN register fields set by userspace.

1
src/amd/common/ac_linux_drm.h
View file

@ -274,6 +274,7 @@ enum amdgpu_gpu_va_range
enum amdgpu_sw_info {
amdgpu_sw_info_address32_hi = 0,
amdgpu_sw_info_address_prt_wa_control_bit = 1,
};
struct amdgpu_bo_alloc_request {