diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index a8e1105c666..8e532322e96 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -1734,6 +1734,18 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
                            &info->pa_sc_raster_config_1, &info->se_tile_repeat);
    }
 
+   if (info->compiler_info.has_smem_with_null_prt_bug) {
+      /* Query the PRT control bit that determines whether a VA is in the
+       * "LOW" or "HIGH" address space. This is needed to implement the SMEM
+       * with NULL PRT workaround.
+       */
+      r = ac_drm_query_sw_info(dev, amdgpu_sw_info_address_prt_wa_control_bit, &info->address_prt_wa_control_bit);
+      if (r) {
+         fprintf(stderr, "amdgpu: amdgpu_query_sw_info(amdgpu_sw_info_address_prt_wa_control_bit) failed.\n");
+         return AC_QUERY_GPU_INFO_FAIL;
+      }
+   }
+
    const char *ib_filename = debug_get_option("AMD_PARSE_IB", NULL);
    if (ib_filename) {
       FILE *f = fopen(ib_filename, "r");
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index e773e4dfa9e..b2556cb5253 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -396,6 +396,7 @@ struct radeon_info {
    bool has_trap_handler_support;
    bool kernel_has_modifiers;
    uint32_t userq_ip_mask; /* AMD_IP_* bits */
+   uint8_t address_prt_wa_control_bit;
 
    /* If the kernel driver uses CU reservation for high priority compute on gfx10+, it programs
     * a global CU mask in the hw that is AND'ed with CU_EN register fields set by userspace.
diff --git a/src/amd/common/ac_linux_drm.h b/src/amd/common/ac_linux_drm.h
index 34f44b80be9..3843b2519ca 100644
--- a/src/amd/common/ac_linux_drm.h
+++ b/src/amd/common/ac_linux_drm.h
@@ -274,6 +274,7 @@ enum amdgpu_gpu_va_range
 
 enum amdgpu_sw_info {
    amdgpu_sw_info_address32_hi = 0,
+   amdgpu_sw_info_address_prt_wa_control_bit = 1,
 };
 
 struct amdgpu_bo_alloc_request {