diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h
index 3637e20e1cf..1245734b7e3 100644
--- a/src/amd/common/ac_surface.h
+++ b/src/amd/common/ac_surface.h
@@ -80,12 +80,6 @@ enum radeon_micro_mode
 #define RADEON_SURF_PREFER_64K_ALIGNMENT  (1ull << 37)
 #define RADEON_SURF_VIDEO_REFERENCE       (1ull << 38)
 
-enum radeon_enc_hevc_surface_alignment
-{
-   RADEON_ENC_HEVC_SURFACE_LOG2_WIDTH_ALIGNMENT = 6,
-   RADEON_ENC_HEVC_SURFACE_LOG2_HEIGHT_ALIGNMENT = 4,
-};
-
 struct legacy_surf_level {
    uint32_t offset_256B;   /* divided by 256, the hw can only do 40-bit addresses */
    uint32_t slice_size_dw; /* in dwords; max = 4GB / 4. */
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index bc6c8a6ce66..08ca0e022a1 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -470,18 +470,27 @@ static int si_get_video_param(struct pipe_screen *screen, enum pipe_video_profil
          }
          else
             return 0;
-      case PIPE_VIDEO_CAP_ENC_SURFACE_ALIGNMENT:
-           if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN ||
-               profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
-            union pipe_enc_cap_surface_alignment attrib;
-            attrib.value = 0;
 
-            attrib.bits.log2_width_alignment = RADEON_ENC_HEVC_SURFACE_LOG2_WIDTH_ALIGNMENT;
-            attrib.bits.log2_height_alignment = RADEON_ENC_HEVC_SURFACE_LOG2_HEIGHT_ALIGNMENT;
-            return attrib.value;
+      case PIPE_VIDEO_CAP_ENC_SURFACE_ALIGNMENT: {
+         union pipe_enc_cap_surface_alignment attrib = {0};
+         if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN ||
+             profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
+            /* 64 x 16 */
+            attrib.bits.log2_width_alignment = 6;
+            attrib.bits.log2_height_alignment = 4;
+         } else if (profile == PIPE_VIDEO_PROFILE_AV1_MAIN) {
+            if (sscreen->info.vcn_ip_version < VCN_5_0_0) {
+               /* 64 x 16 */
+               attrib.bits.log2_width_alignment = 6;
+               attrib.bits.log2_height_alignment = 4;
+            } else {
+               /* 8 x 2 */
+               attrib.bits.log2_width_alignment = 3;
+               attrib.bits.log2_height_alignment = 1;
+            }
          }
-         else
-            return 0;
+         return attrib.value;
+      }
 
       case PIPE_VIDEO_CAP_ENC_RATE_CONTROL_QVBR:
          if (sscreen->info.vcn_ip_version >= VCN_3_0_0 &&