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nvfx: so->RING_3D: vertprog
We could use an sb here instead, but there is no obvious performance advantage, and perhaps there could be a disadvantage.
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parent
f768528af5
commit
5eb6b1a981
2 changed files with 19 additions and 27 deletions
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@ -39,7 +39,6 @@ struct nvfx_vertex_program {
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uint32_t ir;
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uint32_t or;
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uint32_t clip_ctrl;
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struct nouveau_stateobj *so;
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};
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struct nvfx_fragment_program_data {
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@ -847,6 +847,7 @@ nvfx_vertprog_validate(struct nvfx_context *nvfx)
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vp = nvfx->vertprog;
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constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX];
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// TODO: ouch! can't we just use constant slots for these?!
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if ((nvfx->dirty & NVFX_NEW_UCP) ||
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memcmp(&nvfx->clip, &vp->ucp, sizeof(vp->ucp))) {
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nvfx_vertprog_destroy(nvfx, vp);
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@ -858,21 +859,19 @@ nvfx_vertprog_validate(struct nvfx_context *nvfx)
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}
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/* Translate TGSI shader into hw bytecode */
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if (vp->translated)
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goto check_gpu_resources;
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nvfx->fallback_swtnl &= ~NVFX_NEW_VERTPROG;
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if (!vp->translated)
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{
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nvfx->fallback_swtnl &= ~NVFX_NEW_VERTPROG;
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nvfx_vertprog_translate(nvfx, vp);
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if (!vp->translated) {
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nvfx->fallback_swtnl |= NVFX_NEW_VERTPROG;
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if (!vp->translated) {
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nvfx->fallback_swtnl |= NVFX_NEW_VERTPROG;
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return FALSE;
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}
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}
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check_gpu_resources:
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/* Allocate hw vtxprog exec slots */
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if (!vp->exec) {
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struct nouveau_resource *heap = nvfx->screen->vp_exec_heap;
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struct nouveau_stateobj *so;
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uint vplen = vp->nr_insns;
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if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) {
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@ -887,19 +886,6 @@ check_gpu_resources:
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assert(0);
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}
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so = so_new(3, 4, 0);
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so_method(so, eng3d, NV34TCL_VP_START_FROM_ID, 1);
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so_data (so, vp->exec->start);
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if(nvfx->is_nv4x) {
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so_method(so, eng3d, NV40TCL_VP_ATTRIB_EN, 2);
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so_data (so, vp->ir);
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so_data (so, vp->or);
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}
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so_method(so, eng3d, NV34TCL_VP_CLIP_PLANES_ENABLE, 1);
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so_data (so, vp->clip_ctrl);
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so_ref(so, &vp->so);
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so_ref(NULL, &so);
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upload_code = TRUE;
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}
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@ -1007,9 +993,18 @@ check_gpu_resources:
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}
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}
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if (vp->so != nvfx->state.hw[NVFX_STATE_VERTPROG]) {
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so_ref(vp->so, &nvfx->state.hw[NVFX_STATE_VERTPROG]);
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return TRUE;
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if(nvfx->dirty & (NVFX_NEW_VERTPROG | NVFX_NEW_UCP))
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{
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WAIT_RING(chan, 7);
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OUT_RING(chan, RING_3D(NV34TCL_VP_START_FROM_ID, 1));
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OUT_RING(chan, vp->exec->start);
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if(nvfx->is_nv4x) {
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OUT_RING(chan, RING_3D(NV40TCL_VP_ATTRIB_EN, 2));
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OUT_RING(chan, vp->ir);
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OUT_RING(chan, vp->or);
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}
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OUT_RING(chan, RING_3D(NV34TCL_VP_CLIP_PLANES_ENABLE, 1));
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OUT_RING(chan, vp->clip_ctrl);
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}
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return FALSE;
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@ -1039,13 +1034,11 @@ nvfx_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp)
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vp->data_start_min = 0;
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vp->ir = vp->or = vp->clip_ctrl = 0;
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so_ref(NULL, &vp->so);
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}
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struct nvfx_state_entry nvfx_state_vertprog = {
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.validate = nvfx_vertprog_validate,
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.dirty = {
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.pipe = NVFX_NEW_VERTPROG | NVFX_NEW_UCP,
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.hw = NVFX_STATE_VERTPROG,
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}
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};
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