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r600/sfn: fix typos in code
Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
This commit is contained in:
parent
298f555572
commit
5bb8d513cc
7 changed files with 35 additions and 35 deletions
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@ -135,9 +135,9 @@ public:
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AluInstr *m_last_lds_instr{nullptr};
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};
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class BlockSheduler {
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class BlockScheduler {
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public:
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BlockSheduler(r600_chip_class chip_class);
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BlockScheduler(r600_chip_class chip_class);
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void run(Shader *shader);
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void finalize();
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@ -206,7 +206,7 @@ private:
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Block *m_current_block;
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int m_lds_addr_count{0};
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int m_alu_groups_schduled{0};
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int m_alu_groups_scheduled{0};
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r600_chip_class m_chip_class;
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};
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@ -227,7 +227,7 @@ schedule(Shader *original)
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// to be able to re-start scheduling
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auto scheduled_shader = original;
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BlockSheduler s(original->chip_class());
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BlockScheduler s(original->chip_class());
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s.run(scheduled_shader);
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s.finalize();
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@ -241,7 +241,7 @@ schedule(Shader *original)
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return scheduled_shader;
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}
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BlockSheduler::BlockSheduler(r600_chip_class chip_class):
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BlockScheduler::BlockScheduler(r600_chip_class chip_class):
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current_shed(sched_alu),
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m_last_pos(nullptr),
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m_last_pixel(nullptr),
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@ -252,7 +252,7 @@ BlockSheduler::BlockSheduler(r600_chip_class chip_class):
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}
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void
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BlockSheduler::run(Shader *shader)
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BlockScheduler::run(Shader *shader)
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{
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Shader::ShaderBlocks scheduled_blocks;
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@ -270,7 +270,7 @@ BlockSheduler::run(Shader *shader)
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}
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void
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BlockSheduler::schedule_block(Block& in_block,
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BlockScheduler::schedule_block(Block& in_block,
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Shader::ShaderBlocks& out_blocks,
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ValueFactory& vf)
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{
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@ -460,7 +460,7 @@ BlockSheduler::schedule_block(Block& in_block,
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}
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void
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BlockSheduler::finalize()
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BlockScheduler::finalize()
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{
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if (m_last_pos)
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m_last_pos->set_is_last_export(true);
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@ -471,7 +471,7 @@ BlockSheduler::finalize()
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}
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bool
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BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
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BlockScheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
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{
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bool success = false;
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AluGroup *group = nullptr;
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@ -485,7 +485,7 @@ BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
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if (has_alu_ready || !alu_groups_ready.empty()) {
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if (m_current_block->type() != Block::alu) {
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start_new_block(out_blocks, Block::alu);
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m_alu_groups_schduled = 0;
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m_alu_groups_scheduled = 0;
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}
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}
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@ -533,7 +533,7 @@ BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
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}
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if (success) {
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++m_alu_groups_schduled;
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++m_alu_groups_scheduled;
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break;
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} else if (m_current_block->kcache_reservation_failed()) {
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// LDS read groups should not lead to impossible
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@ -570,7 +570,7 @@ BlockSheduler::schedule_alu(Shader::ShaderBlocks& out_blocks)
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}
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bool
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BlockSheduler::schedule_tex(Shader::ShaderBlocks& out_blocks)
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BlockScheduler::schedule_tex(Shader::ShaderBlocks& out_blocks)
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{
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if (m_current_block->type() != Block::tex || m_current_block->remaining_slots() == 0) {
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start_new_block(out_blocks, Block::tex);
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@ -598,7 +598,7 @@ BlockSheduler::schedule_tex(Shader::ShaderBlocks& out_blocks)
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}
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bool
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BlockSheduler::schedule_vtx(Shader::ShaderBlocks& out_blocks)
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BlockScheduler::schedule_vtx(Shader::ShaderBlocks& out_blocks)
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{
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if (m_current_block->type() != Block::vtx || m_current_block->remaining_slots() == 0) {
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start_new_block(out_blocks, Block::vtx);
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@ -609,7 +609,7 @@ BlockSheduler::schedule_vtx(Shader::ShaderBlocks& out_blocks)
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template <typename I>
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bool
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BlockSheduler::schedule_gds(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
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BlockScheduler::schedule_gds(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
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{
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bool was_full = m_current_block->remaining_slots() == 0;
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if (m_current_block->type() != Block::gds || was_full) {
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@ -621,7 +621,7 @@ BlockSheduler::schedule_gds(Shader::ShaderBlocks& out_blocks, std::list<I *>& re
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}
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void
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BlockSheduler::start_new_block(Shader::ShaderBlocks& out_blocks, Block::Type type)
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BlockScheduler::start_new_block(Shader::ShaderBlocks& out_blocks, Block::Type type)
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{
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if (!m_current_block->empty()) {
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sfn_log << SfnLog::schedule << "Start new block\n";
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@ -635,7 +635,7 @@ BlockSheduler::start_new_block(Shader::ShaderBlocks& out_blocks, Block::Type typ
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template <typename I>
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bool
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BlockSheduler::schedule_cf(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
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BlockScheduler::schedule_cf(Shader::ShaderBlocks& out_blocks, std::list<I *>& ready_list)
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{
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if (ready_list.empty())
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return false;
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@ -645,7 +645,7 @@ BlockSheduler::schedule_cf(Shader::ShaderBlocks& out_blocks, std::list<I *>& rea
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}
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bool
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BlockSheduler::schedule_alu_to_group_vec(AluGroup *group)
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BlockScheduler::schedule_alu_to_group_vec(AluGroup *group)
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{
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assert(group);
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assert(!alu_vec_ready.empty());
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@ -681,7 +681,7 @@ BlockSheduler::schedule_alu_to_group_vec(AluGroup *group)
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}
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bool
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BlockSheduler::schedule_alu_to_group_trans(AluGroup *group,
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BlockScheduler::schedule_alu_to_group_trans(AluGroup *group,
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std::list<AluInstr *>& readylist)
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{
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assert(group);
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@ -714,7 +714,7 @@ BlockSheduler::schedule_alu_to_group_trans(AluGroup *group,
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template <typename I>
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bool
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BlockSheduler::schedule(std::list<I *>& ready_list)
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BlockScheduler::schedule(std::list<I *>& ready_list)
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{
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if (!ready_list.empty() && m_current_block->remaining_slots() > 0) {
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auto ii = ready_list.begin();
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@ -729,7 +729,7 @@ BlockSheduler::schedule(std::list<I *>& ready_list)
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template <typename I>
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bool
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BlockSheduler::schedule_block(std::list<I *>& ready_list)
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BlockScheduler::schedule_block(std::list<I *>& ready_list)
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{
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bool success = false;
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while (!ready_list.empty() && m_current_block->remaining_slots() > 0) {
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@ -745,7 +745,7 @@ BlockSheduler::schedule_block(std::list<I *>& ready_list)
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}
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bool
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BlockSheduler::schedule_exports(Shader::ShaderBlocks& out_blocks,
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BlockScheduler::schedule_exports(Shader::ShaderBlocks& out_blocks,
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std::list<ExportInstr *>& ready_list)
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{
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if (m_current_block->type() != Block::cf)
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@ -775,7 +775,7 @@ BlockSheduler::schedule_exports(Shader::ShaderBlocks& out_blocks,
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}
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bool
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BlockSheduler::collect_ready(CollectInstructions& available)
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BlockScheduler::collect_ready(CollectInstructions& available)
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{
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sfn_log << SfnLog::schedule << "Ready instructions\n";
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bool result = false;
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@ -795,7 +795,7 @@ BlockSheduler::collect_ready(CollectInstructions& available)
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}
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bool
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BlockSheduler::collect_ready_alu_vec(std::list<AluInstr *>& ready,
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BlockScheduler::collect_ready_alu_vec(std::list<AluInstr *>& ready,
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std::list<AluInstr *>& available)
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{
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auto i = available.begin();
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@ -911,7 +911,7 @@ template <> struct type_char<RatInstr> {
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template <typename T>
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bool
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BlockSheduler::collect_ready_type(std::list<T *>& ready, std::list<T *>& available)
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BlockScheduler::collect_ready_type(std::list<T *>& ready, std::list<T *>& available)
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{
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auto i = available.begin();
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auto e = available.end();
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@ -36,4 +36,4 @@ schedule(Shader *original);
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}
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#endif // SHEDULER_H
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#endif // SCHEDULER_H
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@ -436,8 +436,8 @@ VertexShader::do_scan_instruction(nir_instr *instr)
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switch (intr->intrinsic) {
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case nir_intrinsic_load_input: {
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int vtx_register = nir_intrinsic_base(intr) + 1;
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if (m_last_vertex_atribute_register < vtx_register)
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m_last_vertex_atribute_register = vtx_register;
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if (m_last_vertex_attribute_register < vtx_register)
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m_last_vertex_attribute_register = vtx_register;
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return true;
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}
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case nir_intrinsic_store_output: {
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@ -546,7 +546,7 @@ VertexShader::do_allocate_reserved_registers()
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m_rel_vertex_id = value_factory().allocate_pinned_register(0, 1);
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}
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return m_last_vertex_atribute_register + 1;
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return m_last_vertex_attribute_register + 1;
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}
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bool
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@ -178,7 +178,7 @@ private:
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void do_get_shader_info(r600_shader *sh_info) override;
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VertexExportStage *m_export_stage{nullptr};
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int m_last_vertex_atribute_register{0};
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int m_last_vertex_attribute_register{0};
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PRegister m_vertex_id{nullptr};
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PRegister m_instance_id{nullptr};
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PRegister m_rel_vertex_id{nullptr};
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@ -164,11 +164,11 @@ TEST_F(TestShaderFromNir, RA_with_dest_array)
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TEST_F(TestShaderFromNir, RA_with_chan_group)
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{
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auto sh = from_string(shader_group_chan_pin_combined_sheduled);
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auto sh = from_string(shader_group_chan_pin_combined_scheduled);
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auto lrm = r600::LiveRangeEvaluator().run(*sh);
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EXPECT_TRUE(r600::register_allocation(lrm));
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ra_check(sh, shader_group_chan_pin_combined_sheduled_ra);
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ra_check(sh, shader_group_chan_pin_combined_scheduled_ra);
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}
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TEST_F(TestShaderFromNir, TES_opt)
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@ -2178,7 +2178,7 @@ ALU_GROUP_END
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EXPORT_DONE PIXEL 0 S1.xyzw
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)";
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const char *shader_group_chan_pin_combined_sheduled =
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const char *shader_group_chan_pin_combined_scheduled =
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R"(FS
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CHIPCLASS EVERGREEN
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PROP MAX_COLOR_EXPORTS:1
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@ -2204,7 +2204,7 @@ ALU_GROUP_END
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EXPORT_DONE PIXEL 0 S2.xyzw
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)";
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const char *shader_group_chan_pin_combined_sheduled_ra =
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const char *shader_group_chan_pin_combined_scheduled_ra =
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R"(FS
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CHIPCLASS EVERGREEN
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PROP MAX_COLOR_EXPORTS:1
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@ -64,8 +64,8 @@ extern const char *shader_with_dest_array2_scheduled_ra;
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extern const char *shader_group_chan_pin_to_combine;
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extern const char *shader_group_chan_pin_combined;
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extern const char *shader_group_chan_pin_combined_sheduled;
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extern const char *shader_group_chan_pin_combined_sheduled_ra;
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extern const char *shader_group_chan_pin_combined_scheduled;
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extern const char *shader_group_chan_pin_combined_scheduled_ra;
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extern const char *shader_group_chan_pin_to_combine_2;
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extern const char *shader_group_chan_pin_to_combine_2_opt;
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