r600/sfn: fix typos

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22432>
This commit is contained in:
Harri Nieminen 2023-04-13 14:09:00 +03:00 committed by Marge Bot
parent 7eaab5dec0
commit 298f555572
16 changed files with 28 additions and 28 deletions

View file

@ -286,7 +286,7 @@ ReserveReadportVec::visit(const Register& value)
void
ReserveReadportVec::visit(const LocalArrayValue& value)
{
// Set the hightest non-sign bit to indicated that we use the
// Set the highest non-sign bit to indicated that we use the
// AR register
reserve_gpr(0x4000000 | value.sel(), value.chan());
}

View file

@ -797,7 +797,7 @@ AssamblerVisitor::visit(const RatInstr& instr)
{
struct r600_bytecode_gds gds;
/* The instruction writes to the retuen buffer loaction, and
/* The instruction writes to the retuen buffer location, and
* the value will actually be read back, so make sure all previous writes
* have been finished */
if (m_ack_suggested /*&& instr.has_instr_flag(Instr::ack_rat_return_write)*/)

View file

@ -430,7 +430,7 @@ bool AluInstr::can_replace_source(PRegister old_src, PVirtualValue new_src)
if (new_src->get_addr()) {
for (auto& s : m_src) {
auto addr = s->get_addr();
/* can't have two differen't indirect addresses in the same instr */
/* can't have two different indirect addresses in the same instr */
if (addr && !addr->equal_to(*new_src->get_addr()))
return false;
}
@ -516,8 +516,8 @@ AluInstr::replace_dest(PRegister new_dest, AluInstr *move_instr)
return false;
/* Currently we bail out when an array write should be moved, because
* decalring an array write is currently not well defined. The
* Whole "backwards" copy propagation shoul dprobably be replaced by some
* declaring an array write is currently not well defined. The
* Whole "backwards" copy propagation should dprobably be replaced by some
* forward peep holew optimization */
/*
if (new_dest->pin() == pin_array) {
@ -865,7 +865,7 @@ AluInstr::propagate_death()
/* We assume that nir does a good job in eliminating all ALU results that
* are not needed, and we don't let copy propagation doesn't make the
* instruction obsolte, so just keep all */
* instruction obsolete, so just keep all */
if (has_alu_flag(alu_is_cayman_trans))
return false;

View file

@ -78,7 +78,7 @@ FetchInstr::FetchInstr(EVFetchInstr opcode,
m_opname = "READ_SCRATCH";
break;
default:
unreachable("Unknwon fetch instruction");
unreachable("Unknown fetch instruction");
}
if (m_src)
@ -204,7 +204,7 @@ FetchInstr::do_print(std::ostream& os) const
os << " NO_IDX_OFFSET";
break;
default:
unreachable("Unknwon fetch instruction type");
unreachable("Unknown fetch instruction type");
}
}
@ -214,7 +214,7 @@ FetchInstr::do_print(std::ostream& os) const
if (fmt != s_data_format_map.end())
os << fmt->second << ",";
else
unreachable("unknwon data format");
unreachable("unknown data format");
if (m_tex_flags.test(format_comp_signed))
os << "S";
@ -232,7 +232,7 @@ FetchInstr::do_print(std::ostream& os) const
os << "SCALED";
break;
default:
unreachable("Unknwon number format");
unreachable("Unknown number format");
}
os << ")";
@ -680,7 +680,7 @@ public:
if (value.sel() == ALU_SRC_1_INT)
m_lfs->set_array_base(1);
else if (value.sel() != ALU_SRC_0)
unreachable("Scratch array base is an inpossible inline constant");
unreachable("Scratch array base is an impossible inline constant");
m_lfs->set_src(new Register(0, 7, pin_none));
}

View file

@ -154,7 +154,7 @@ LDSReadInstr::split(std::vector<AluInstr *>& out_block, AluInstr *last_lds_instr
bool
LDSReadInstr::do_ready() const
{
unreachable("This instruction is not handled by the schduler");
unreachable("This instruction is not handled by the scheduler");
return false;
}
@ -378,7 +378,7 @@ LDSAtomicInstr::replace_source(PRegister old_src, PVirtualValue new_src)
if (new_src->get_addr()) {
for (auto& s : m_srcs) {
auto addr = s->get_addr();
/* can't have two differen't indirect addresses in the same instr */
/* can't have two different indirect addresses in the same instr */
if (addr && !addr->equal_to(*new_src->get_addr()))
return false;
}
@ -403,7 +403,7 @@ LDSAtomicInstr::replace_source(PRegister old_src, PVirtualValue new_src)
bool
LDSAtomicInstr::do_ready() const
{
unreachable("This instruction is not handled by the schduler");
unreachable("This instruction is not handled by the scheduler");
return false;
}

View file

@ -924,7 +924,7 @@ RatInstr::emit_image_size(nir_intrinsic_instr *intrin, Shader& shader)
R600_BUFFER_INFO_CONST_BUFFER),
AluInstr::last_write));
} else {
/* If the adressing is indirect we have to get the z-value by
/* If the addressing is indirect we have to get the z-value by
* using a binary search */
auto addr = vf.temp_register();
auto comp1 = vf.temp_register();

View file

@ -128,7 +128,7 @@ private:
*
* A positive (other than "conditionality_untouched") number refers to the
* last loop id for which the write was resolved as unconditional. With
* each new loop this value will be overwitten by
* each new loop this value will be overwritten by
* "conditionality_unresolved" on entering the first IF clause writing this
* temporary.
*

View file

@ -40,7 +40,7 @@ namespace r600 {
#ifndef HAVE_MEMORY_RESOURCE
/* Fallback memory resource if the C++17 memory resource is not
* avaliable
* available
*/
struct MemoryBacking {
~MemoryBacking();

View file

@ -186,7 +186,7 @@ r600_legalize_image_load_store_filter(const nir_instr *instr, UNUSED const void
}
/* This pass makes sure only existing images are accessd and
* the access is withing range, if not zero is returned by all
* the access is within range, if not zero is returned by all
* image ops that return a value.
*/
bool

View file

@ -207,7 +207,7 @@ class LowerSplit64op : public NirLowerInstruction {
return nir_bcsel(b, gt0, value, nir_ineg(b, value));
}
case nir_op_f2u32: {
/* fp32 doesn't hold suffient bits to represent the full range of
/* fp32 doesn't hold sufficient bits to represent the full range of
* u32, therefore we have to split the values, and because f2f32
* rounds, we have to remove the fractional part in the hi bits
* For values > UINT_MAX the result is undefined */

View file

@ -382,7 +382,7 @@ CopyPropFwdVisitor::visit(AluInstr *instr)
if (!can_propagate) {
/* Register can propagate if the assigment was in the same
/* Register can propagate if the assignment was in the same
* block, and we don't have a second assignment coming later
* (e.g. helper invocation evaluation does
*

View file

@ -245,7 +245,7 @@ ReplacePredicate::visit(AluInstr *alu)
for (auto& s : alu->sources()) {
auto reg = s->as_register();
/* Protext against propagating
/* Protect against propagating
*
* V = COND(R, X)
* R = SOME_OP

View file

@ -702,7 +702,7 @@ BlockSheduler::schedule_alu_to_group_trans(AluGroup *group,
++i;
readylist.erase(old_i);
success = true;
sfn_log << SfnLog::schedule << " sucess\n";
sfn_log << SfnLog::schedule << " success\n";
break;
} else {
++i;
@ -813,7 +813,7 @@ BlockSheduler::collect_ready_alu_vec(std::list<AluInstr *>& ready,
/* LDS fetches that use static offsets are usually ready ery fast,
* so that they would get schedules early, and this leaves the
* problem that we allocate too many registers with just constant
* values, and this will make problems wih RA. So limit the number of
* values, and this will make problems with RA. So limit the number of
* LDS address registers.
*/
if ((*i)->has_alu_flag(alu_lds_address)) {

View file

@ -1244,7 +1244,7 @@ Shader::load_ubo(nir_intrinsic_instr *instr)
if (!buf_offset) {
/* TODO: if bufid is constant then this can also be solved by using the
* CF indes on the ALU block, and this would probably make sense when
* CF index on the ALU block, and this would probably make sense when
* there are more then one loads with the same buffer ID. */
auto addr = value_factory().src(instr->src[1], 0)->as_register();

View file

@ -662,7 +662,7 @@ ValueFactory::dest_from_string(const std::string& s)
int sel = 0;
if (s[0] == '_') {
/* Since these instructions still may use or switch to a different
* channel we have to create a new instance for each occurance */
* channel we have to create a new instance for each occurrence */
sel = std::numeric_limits<int>::max() - m_nowrite_idx++;
} else {
std::istringstream n(index_str);

View file

@ -644,7 +644,7 @@ InlineConstant::from_string(const std::string& s)
use_chan = entry->second.second;
}
ASSERT_OR_THROW(value != ALU_SRC_UNKNOWN, "Unknwon inline constant was given");
ASSERT_OR_THROW(value != ALU_SRC_UNKNOWN, "Unknown inline constant was given");
if (use_chan) {
ASSERT_OR_THROW(s[i + 1] == '.', "inline const channel not started with '.'");
@ -671,7 +671,7 @@ InlineConstant::from_string(const std::string& s)
chan = 7;
break;
default:
ASSERT_OR_THROW(0, "invalied inline const channel ");
ASSERT_OR_THROW(0, "invalid inline const channel ");
}
}
return new InlineConstant(value, chan);
@ -804,7 +804,7 @@ UniformValue::from_string(const std::string& s)
chan = 3;
break;
default:
unreachable("Unknown channle when reading uniform");
unreachable("Unknown channel when reading uniform");
}
return new UniformValue(index + 512, chan, bank);
}