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lima: ppir: assert on unexpected pipeline dest for fmul and vmul
Assert on unexpected pipeline dest for fmul and vmul to catch scheduler bugs early Reviewed-by: Erico Nunes <nunes.erico@gmail.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33540>
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1 changed files with 7 additions and 0 deletions
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@ -226,6 +226,9 @@ static void ppir_codegen_encode_vec_mul(ppir_node *node, void *code)
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ppir_alu_node *alu = ppir_node_to_alu(node);
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ppir_dest *dest = &alu->dest;
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assert(!(dest->type == ppir_target_pipeline && dest->pipeline == ppir_pipeline_reg_fmul));
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int dest_shift = 0;
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if (dest->type != ppir_target_pipeline) {
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int index = ppir_target_get_dest_reg_index(dest);
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@ -299,6 +302,9 @@ static void ppir_codegen_encode_scl_mul(ppir_node *node, void *code)
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ppir_alu_node *alu = ppir_node_to_alu(node);
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ppir_dest *dest = &alu->dest;
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assert(!(dest->type == ppir_target_pipeline && dest->pipeline == ppir_pipeline_reg_vmul));
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int dest_component = ffs(dest->write_mask) - 1;
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assert(dest_component >= 0);
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@ -368,6 +374,7 @@ static void ppir_codegen_encode_vec_add(ppir_node *node, void *code)
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ppir_alu_node *alu = ppir_node_to_alu(node);
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ppir_dest *dest = &alu->dest;
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int index = ppir_target_get_dest_reg_index(dest);
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int dest_shift = index & 0x3;
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f->dest = index >> 2;
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