From 5937d12d293bf7631da7c692ba085cfdb58f1b13 Mon Sep 17 00:00:00 2001 From: Vasily Khoruzhick Date: Fri, 14 Feb 2025 11:18:35 -0800 Subject: [PATCH] lima: ppir: assert on unexpected pipeline dest for fmul and vmul Assert on unexpected pipeline dest for fmul and vmul to catch scheduler bugs early Reviewed-by: Erico Nunes Signed-off-by: Vasily Khoruzhick Part-of: --- src/gallium/drivers/lima/ir/pp/codegen.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/gallium/drivers/lima/ir/pp/codegen.c b/src/gallium/drivers/lima/ir/pp/codegen.c index 55f8ee6b6b4..4ce7ed6b9b0 100644 --- a/src/gallium/drivers/lima/ir/pp/codegen.c +++ b/src/gallium/drivers/lima/ir/pp/codegen.c @@ -226,6 +226,9 @@ static void ppir_codegen_encode_vec_mul(ppir_node *node, void *code) ppir_alu_node *alu = ppir_node_to_alu(node); ppir_dest *dest = &alu->dest; + + assert(!(dest->type == ppir_target_pipeline && dest->pipeline == ppir_pipeline_reg_fmul)); + int dest_shift = 0; if (dest->type != ppir_target_pipeline) { int index = ppir_target_get_dest_reg_index(dest); @@ -299,6 +302,9 @@ static void ppir_codegen_encode_scl_mul(ppir_node *node, void *code) ppir_alu_node *alu = ppir_node_to_alu(node); ppir_dest *dest = &alu->dest; + + assert(!(dest->type == ppir_target_pipeline && dest->pipeline == ppir_pipeline_reg_vmul)); + int dest_component = ffs(dest->write_mask) - 1; assert(dest_component >= 0); @@ -368,6 +374,7 @@ static void ppir_codegen_encode_vec_add(ppir_node *node, void *code) ppir_alu_node *alu = ppir_node_to_alu(node); ppir_dest *dest = &alu->dest; + int index = ppir_target_get_dest_reg_index(dest); int dest_shift = index & 0x3; f->dest = index >> 2;