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freedreno: switch to NIR loop unrolling
Force unroll setting based on GLSL IR settings:
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
/* a2xx compiler doesn't handle indirect: */
return is_ir3(screen) ? 1 : 0;
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16366>
This commit is contained in:
parent
34e868d882
commit
57dee95b85
3 changed files with 7 additions and 4 deletions
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@ -115,7 +115,8 @@ ir3_compiler_destroy(struct ir3_compiler *compiler)
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.has_isub = true, \
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.force_indirect_unrolling_sampler = true, \
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.lower_uniforms_to_ubo = true, \
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.use_scoped_barrier = true
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.use_scoped_barrier = true, \
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.max_unroll_iterations = 32
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static const nir_shader_compiler_options nir_options = {
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COMMON_OPTIONS,
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@ -133,7 +134,6 @@ static const nir_shader_compiler_options nir_options = {
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static const nir_shader_compiler_options nir_options_a6xx = {
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COMMON_OPTIONS,
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.vectorize_io = true,
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.max_unroll_iterations = 32,
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.force_indirect_unrolling = nir_var_all,
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.lower_wpos_pntc = true,
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.lower_cs_local_index_to_id = true,
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@ -287,6 +287,9 @@ ir3_compiler_create(struct fd_device *dev, const struct fd_dev_id *dev_id,
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compiler->nir_options.has_sudot_4x8 = dev_info->a6xx.has_dp2acc;
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} else {
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compiler->nir_options = nir_options;
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/* a2xx compiler doesn't handle indirect: */
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if (compiler->gen <= 2)
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compiler->nir_options.force_indirect_unrolling = nir_var_all;
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}
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if (!options->disable_cache)
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@ -51,6 +51,7 @@ static const nir_shader_compiler_options options = {
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.lower_insert_word = true,
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.force_indirect_unrolling = nir_var_all,
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.force_indirect_unrolling_sampler = true,
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.max_unroll_iterations = 32,
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};
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const nir_shader_compiler_options *
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@ -649,6 +649,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
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case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
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case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
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return 0;
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case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
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return 1;
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@ -675,8 +676,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
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COND(has_compute(screen) && (shader == PIPE_SHADER_COMPUTE),
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(1 << PIPE_SHADER_IR_NIR_SERIALIZED)) |
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(1 << PIPE_SHADER_IR_TGSI);
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case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
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return 32;
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case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen)) {
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