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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-23 02:30:12 +01:00
turnip: enable VK_EXT_line_rasterization
By default line mode is VK_LINE_RASTERIZATION_MODE_RECTANGULAR_EXT, when lineRasterizationMode is VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT and primtype is line - we enable bresenham line mode. We have to disable MSAA when bresenham lines are used, this is a hardware limitation and spec allows it: "When Bresenham lines are being rasterized, sample locations may all be treated as being at the pixel center (this may affect attribute and depth interpolation)." This forces us to re-emit msaa state when line mode is changed. Signed-off-by: Hyunjun Ko <zzoon@igalia.com> Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6020>
This commit is contained in:
parent
88afceacf0
commit
542211676c
7 changed files with 86 additions and 12 deletions
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@ -529,7 +529,7 @@ Khronos extensions that are not part of any Vulkan version:
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VK_EXT_image_robustness DONE (anv, radv)
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VK_EXT_image_robustness DONE (anv, radv)
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VK_EXT_index_type_uint8 DONE (anv, lvp, radv/gfx8+, v3dv, tu)
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VK_EXT_index_type_uint8 DONE (anv, lvp, radv/gfx8+, v3dv, tu)
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VK_EXT_inline_uniform_block DONE (anv, radv)
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VK_EXT_inline_uniform_block DONE (anv, radv)
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VK_EXT_line_rasterization DONE (anv, lvp, radv)
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VK_EXT_line_rasterization DONE (anv, lvp, radv, tu)
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VK_EXT_memory_budget DONE (anv, radv, tu)
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VK_EXT_memory_budget DONE (anv, radv, tu)
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VK_EXT_memory_priority DONE (radv)
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VK_EXT_memory_priority DONE (radv)
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VK_EXT_multi_draw DONE (anv, lvp, radv)
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VK_EXT_multi_draw DONE (anv, lvp, radv)
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@ -696,7 +696,8 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool blit,
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}
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}
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}
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}
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tu6_emit_msaa(cs, samples);
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cmd->state.line_mode = RECTANGULAR;
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tu6_emit_msaa(cs, samples, cmd->state.line_mode);
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}
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}
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static void
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static void
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@ -304,10 +304,11 @@ tu6_emit_mrt(struct tu_cmd_buffer *cmd,
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}
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}
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void
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void
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tu6_emit_msaa(struct tu_cs *cs, VkSampleCountFlagBits vk_samples)
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tu6_emit_msaa(struct tu_cs *cs, VkSampleCountFlagBits vk_samples,
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enum a5xx_line_mode line_mode)
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{
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{
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const enum a3xx_msaa_samples samples = tu_msaa_samples(vk_samples);
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const enum a3xx_msaa_samples samples = tu_msaa_samples(vk_samples);
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bool msaa_disable = samples == MSAA_ONE;
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bool msaa_disable = (samples == MSAA_ONE) || (line_mode == BRESENHAM);
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tu_cs_emit_regs(cs,
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tu_cs_emit_regs(cs,
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A6XX_SP_TP_RAS_MSAA_CNTL(samples),
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A6XX_SP_TP_RAS_MSAA_CNTL(samples),
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@ -1589,6 +1590,7 @@ tu_BeginCommandBuffer(VkCommandBuffer commandBuffer,
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memset(&cmd_buffer->state, 0, sizeof(cmd_buffer->state));
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memset(&cmd_buffer->state, 0, sizeof(cmd_buffer->state));
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cmd_buffer->state.index_size = 0xff; /* dirty restart index */
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cmd_buffer->state.index_size = 0xff; /* dirty restart index */
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cmd_buffer->state.line_mode = RECTANGULAR;
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tu_cache_init(&cmd_buffer->state.cache);
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tu_cache_init(&cmd_buffer->state.cache);
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tu_cache_init(&cmd_buffer->state.renderpass_cache);
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tu_cache_init(&cmd_buffer->state.renderpass_cache);
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@ -2206,6 +2208,21 @@ tu_CmdBindPipeline(VkCommandBuffer commandBuffer,
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tu_cs_emit_draw_state(cs, TU_DRAW_STATE_DYNAMIC + i, pipeline->dynamic_state[i]);
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tu_cs_emit_draw_state(cs, TU_DRAW_STATE_DYNAMIC + i, pipeline->dynamic_state[i]);
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}
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}
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if (cmd->state.line_mode != pipeline->line_mode) {
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cmd->state.line_mode = pipeline->line_mode;
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/* We have to disable MSAA when bresenham lines are used, this is
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* a hardware limitation and spec allows it:
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*
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* When Bresenham lines are being rasterized, sample locations may
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* all be treated as being at the pixel center (this may affect
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* attribute and depth interpolation).
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*/
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if (cmd->state.subpass && cmd->state.subpass->samples) {
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tu6_emit_msaa(&cmd->draw_cs, cmd->state.subpass->samples, cmd->state.line_mode);
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}
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}
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/* the vertex_buffers draw state always contains all the currently
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/* the vertex_buffers draw state always contains all the currently
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* bound vertex buffers. update its size to only emit the vbs which
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* bound vertex buffers. update its size to only emit the vbs which
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* are actually used by the pipeline
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* are actually used by the pipeline
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@ -2617,6 +2634,14 @@ tu_CmdSetPatchControlPointsEXT(VkCommandBuffer commandBuffer,
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tu_stub();
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tu_stub();
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}
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}
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VKAPI_ATTR void VKAPI_CALL
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tu_CmdSetLineStippleEXT(VkCommandBuffer commandBuffer,
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uint32_t lineStippleFactor,
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uint16_t lineStipplePattern)
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{
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tu_stub();
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}
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static void
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static void
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tu_flush_for_access(struct tu_cache_state *cache,
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tu_flush_for_access(struct tu_cache_state *cache,
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enum tu_cmd_access_mask src_mask,
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enum tu_cmd_access_mask src_mask,
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@ -3186,7 +3211,7 @@ tu_CmdBeginRenderPass2(VkCommandBuffer commandBuffer,
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tu6_emit_zs(cmd, cmd->state.subpass, &cmd->draw_cs);
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tu6_emit_zs(cmd, cmd->state.subpass, &cmd->draw_cs);
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tu6_emit_mrt(cmd, cmd->state.subpass, &cmd->draw_cs);
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tu6_emit_mrt(cmd, cmd->state.subpass, &cmd->draw_cs);
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if (cmd->state.subpass->samples)
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if (cmd->state.subpass->samples)
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tu6_emit_msaa(&cmd->draw_cs, cmd->state.subpass->samples);
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tu6_emit_msaa(&cmd->draw_cs, cmd->state.subpass->samples, cmd->state.line_mode);
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tu6_emit_render_cntl(cmd, cmd->state.subpass, &cmd->draw_cs, false);
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tu6_emit_render_cntl(cmd, cmd->state.subpass, &cmd->draw_cs, false);
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tu_set_input_attachments(cmd, cmd->state.subpass);
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tu_set_input_attachments(cmd, cmd->state.subpass);
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@ -3255,7 +3280,7 @@ tu_CmdNextSubpass2(VkCommandBuffer commandBuffer,
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tu6_emit_zs(cmd, cmd->state.subpass, cs);
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tu6_emit_zs(cmd, cmd->state.subpass, cs);
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tu6_emit_mrt(cmd, cmd->state.subpass, cs);
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tu6_emit_mrt(cmd, cmd->state.subpass, cs);
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if (cmd->state.subpass->samples)
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if (cmd->state.subpass->samples)
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tu6_emit_msaa(cs, cmd->state.subpass->samples);
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tu6_emit_msaa(cs, cmd->state.subpass->samples, cmd->state.line_mode);
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tu6_emit_render_cntl(cmd, cmd->state.subpass, cs, false);
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tu6_emit_render_cntl(cmd, cmd->state.subpass, cs, false);
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tu_set_input_attachments(cmd, cmd->state.subpass);
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tu_set_input_attachments(cmd, cmd->state.subpass);
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@ -190,6 +190,7 @@ get_device_extensions(const struct tu_physical_device *device,
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.EXT_shader_viewport_index_layer = true,
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.EXT_shader_viewport_index_layer = true,
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.EXT_vertex_attribute_divisor = true,
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.EXT_vertex_attribute_divisor = true,
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.EXT_provoking_vertex = true,
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.EXT_provoking_vertex = true,
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.EXT_line_rasterization = true,
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#ifdef ANDROID
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#ifdef ANDROID
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.ANDROID_native_buffer = true,
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.ANDROID_native_buffer = true,
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#endif
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#endif
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@ -735,6 +736,17 @@ tu_GetPhysicalDeviceFeatures2(VkPhysicalDevice physicalDevice,
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features->mutableDescriptorType = true;
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features->mutableDescriptorType = true;
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break;
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break;
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}
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}
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case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_LINE_RASTERIZATION_FEATURES_EXT: {
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VkPhysicalDeviceLineRasterizationFeaturesEXT *features =
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(VkPhysicalDeviceLineRasterizationFeaturesEXT *)ext;
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features->rectangularLines = true;
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features->bresenhamLines = true;
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features->smoothLines = false;
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features->stippledRectangularLines = false;
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features->stippledBresenhamLines = false;
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features->stippledSmoothLines = false;
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break;
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}
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default:
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default:
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break;
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break;
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@ -1084,6 +1096,12 @@ tu_GetPhysicalDeviceProperties2(VkPhysicalDevice physicalDevice,
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properties->transformFeedbackPreservesTriangleFanProvokingVertex = false;
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properties->transformFeedbackPreservesTriangleFanProvokingVertex = false;
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break;
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break;
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}
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}
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case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_LINE_RASTERIZATION_PROPERTIES_EXT: {
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VkPhysicalDeviceLineRasterizationPropertiesEXT *props =
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(VkPhysicalDeviceLineRasterizationPropertiesEXT *)ext;
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props->lineSubPixelPrecisionBits = 8;
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break;
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}
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default:
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default:
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break;
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break;
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@ -1970,7 +1970,7 @@ tu6_emit_sample_locations(struct tu_cs *cs, const VkSampleLocationsInfoEXT *samp
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static uint32_t
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static uint32_t
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tu6_gras_su_cntl(const VkPipelineRasterizationStateCreateInfo *rast_info,
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tu6_gras_su_cntl(const VkPipelineRasterizationStateCreateInfo *rast_info,
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VkSampleCountFlagBits samples,
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enum a5xx_line_mode line_mode,
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bool multiview)
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bool multiview)
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{
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{
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uint32_t gras_su_cntl = 0;
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uint32_t gras_su_cntl = 0;
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@ -1989,8 +1989,7 @@ tu6_gras_su_cntl(const VkPipelineRasterizationStateCreateInfo *rast_info,
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if (rast_info->depthBiasEnable)
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if (rast_info->depthBiasEnable)
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gras_su_cntl |= A6XX_GRAS_SU_CNTL_POLY_OFFSET;
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gras_su_cntl |= A6XX_GRAS_SU_CNTL_POLY_OFFSET;
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if (samples > VK_SAMPLE_COUNT_1_BIT)
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gras_su_cntl |= A6XX_GRAS_SU_CNTL_LINE_MODE(line_mode);
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gras_su_cntl |= A6XX_GRAS_SU_CNTL_LINE_MODE(RECTANGULAR);
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if (multiview) {
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if (multiview) {
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gras_su_cntl |=
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gras_su_cntl |=
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@ -2763,6 +2762,19 @@ tu_pipeline_builder_parse_rasterization(struct tu_pipeline_builder *builder,
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if (depth_clip_state)
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if (depth_clip_state)
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depth_clip_disable = !depth_clip_state->depthClipEnable;
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depth_clip_disable = !depth_clip_state->depthClipEnable;
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pipeline->line_mode = RECTANGULAR;
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if (tu6_primtype_line(pipeline->ia.primtype)) {
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const VkPipelineRasterizationLineStateCreateInfoEXT *rast_line_state =
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vk_find_struct_const(rast_info->pNext,
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PIPELINE_RASTERIZATION_LINE_STATE_CREATE_INFO_EXT);
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if (rast_line_state && rast_line_state->lineRasterizationMode ==
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VK_LINE_RASTERIZATION_MODE_BRESENHAM_EXT) {
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pipeline->line_mode = BRESENHAM;
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}
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}
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struct tu_cs cs;
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struct tu_cs cs;
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uint32_t cs_size = 9 + (builder->emit_msaa_state ? 11 : 0);
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uint32_t cs_size = 9 + (builder->emit_msaa_state ? 11 : 0);
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pipeline->rast_state = tu_cs_draw_state(&pipeline->cs, &cs, cs_size);
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pipeline->rast_state = tu_cs_draw_state(&pipeline->cs, &cs, cs_size);
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@ -2798,7 +2810,7 @@ tu_pipeline_builder_parse_rasterization(struct tu_pipeline_builder *builder,
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* It happens when subpass doesn't use any color/depth attachment.
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* It happens when subpass doesn't use any color/depth attachment.
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*/
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*/
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if (builder->emit_msaa_state)
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if (builder->emit_msaa_state)
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tu6_emit_msaa(&cs, builder->samples);
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tu6_emit_msaa(&cs, builder->samples, pipeline->line_mode);
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const VkPipelineRasterizationStateStreamCreateInfoEXT *stream_info =
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const VkPipelineRasterizationStateStreamCreateInfoEXT *stream_info =
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vk_find_struct_const(rast_info->pNext,
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vk_find_struct_const(rast_info->pNext,
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@ -2818,7 +2830,7 @@ tu_pipeline_builder_parse_rasterization(struct tu_pipeline_builder *builder,
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}
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}
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pipeline->gras_su_cntl =
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pipeline->gras_su_cntl =
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tu6_gras_su_cntl(rast_info, builder->samples, builder->multiview_mask != 0);
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tu6_gras_su_cntl(rast_info, pipeline->line_mode, builder->multiview_mask != 0);
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if (tu_pipeline_static_state(pipeline, &cs, TU_DYNAMIC_STATE_GRAS_SU_CNTL, 2))
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if (tu_pipeline_static_state(pipeline, &cs, TU_DYNAMIC_STATE_GRAS_SU_CNTL, 2))
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tu_cs_emit_regs(&cs, A6XX_GRAS_SU_CNTL(.dword = pipeline->gras_su_cntl));
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tu_cs_emit_regs(&cs, A6XX_GRAS_SU_CNTL(.dword = pipeline->gras_su_cntl));
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@ -1022,6 +1022,7 @@ struct tu_cmd_state
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bool has_subpass_predication;
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bool has_subpass_predication;
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bool predication_active;
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bool predication_active;
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bool disable_gmem;
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bool disable_gmem;
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enum a5xx_line_mode line_mode;
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struct tu_lrz_state lrz;
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struct tu_lrz_state lrz;
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@ -1213,6 +1214,8 @@ struct tu_pipeline
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bool rb_depth_cntl_disable;
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bool rb_depth_cntl_disable;
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enum a5xx_line_mode line_mode;
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/* draw states for the pipeline */
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/* draw states for the pipeline */
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struct tu_draw_state load_state, rast_state, blend_state;
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struct tu_draw_state load_state, rast_state, blend_state;
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@ -1282,7 +1285,8 @@ tu6_emit_depth_bias(struct tu_cs *cs,
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float clamp,
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float clamp,
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float slope_factor);
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float slope_factor);
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void tu6_emit_msaa(struct tu_cs *cs, VkSampleCountFlagBits samples);
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void tu6_emit_msaa(struct tu_cs *cs, VkSampleCountFlagBits samples,
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enum a5xx_line_mode line_mode);
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void tu6_emit_window_scissor(struct tu_cs *cs, uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2);
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void tu6_emit_window_scissor(struct tu_cs *cs, uint32_t x1, uint32_t y1, uint32_t x2, uint32_t y2);
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@ -85,6 +85,20 @@ tu6_rop(VkLogicOp op)
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return lookup[op];
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return lookup[op];
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}
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}
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static inline bool
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tu6_primtype_line(enum pc_di_primtype type)
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{
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switch(type) {
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case DI_PT_LINELIST:
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case DI_PT_LINESTRIP:
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case DI_PT_LINE_ADJ:
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case DI_PT_LINESTRIP_ADJ:
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return true;
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default:
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return false;
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}
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}
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static inline enum pc_di_primtype
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static inline enum pc_di_primtype
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tu6_primtype(VkPrimitiveTopology topology)
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tu6_primtype(VkPrimitiveTopology topology)
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{
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{
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