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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-06-03 08:58:16 +02:00
nvc0: support user clip planes
This commit is contained in:
parent
67d0c3dd79
commit
5138ac033a
7 changed files with 96 additions and 3 deletions
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@ -418,6 +418,8 @@ nvc0_vp_gen_header(struct nvc0_program *vp, struct nvc0_translation_info *ti)
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vp->hdr[0] = 0x20461;
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vp->hdr[4] = 0xff000;
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vp->hdr[18] = (1 << vp->vp.num_ucps) - 1;
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return nvc0_vp_gp_gen_header(vp, ti);
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}
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@ -605,6 +607,9 @@ nvc0_program_translate(struct nvc0_program *prog)
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ti->edgeflag_out = PIPE_MAX_SHADER_OUTPUTS;
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if (prog->type == PIPE_SHADER_VERTEX && prog->vp.num_ucps)
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ti->append_ucp = TRUE;
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ret = nvc0_prog_scan(ti);
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if (ret) {
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NOUVEAU_ERR("unsupported shader program\n");
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@ -646,5 +651,7 @@ nvc0_program_destroy(struct nvc0_context *nvc0, struct nvc0_program *prog)
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if (prog->relocs)
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FREE(prog->relocs);
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memset(prog->hdr, 0, sizeof(prog->hdr));
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prog->translated = FALSE;
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}
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@ -27,6 +27,7 @@ struct nvc0_program {
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struct {
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uint8_t edgeflag;
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uint8_t num_ucps;
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} vp;
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void *relocs;
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@ -71,6 +72,7 @@ struct nvc0_translation_info {
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ubyte edgeflag_out;
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struct nvc0_subroutine *subr;
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unsigned num_subrs;
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boolean append_ucp;
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struct tgsi_shader_info scan;
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};
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@ -457,11 +457,21 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
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nouveau_resource_init(&screen->text_heap, 0, 1 << 20);
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ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 5 << 16,
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ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16,
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&screen->uniforms);
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if (ret)
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goto fail;
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/* auxiliary constants (6 user clip planes, base instance id) */
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BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
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OUT_RING (chan, 256);
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OUT_RELOCh(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCl(chan, screen->uniforms, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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for (i = 0; i < 5; ++i) {
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BEGIN_RING(chan, RING_3D(CB_BIND(i)), 1);
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OUT_RING (chan, (15 << 4) | 1);
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}
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screen->tls_size = 4 * 4 * 32 * 128 * 4;
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ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
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screen->tls_size, &screen->tls);
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@ -67,6 +67,14 @@ nvc0_vertprog_validate(struct nvc0_context *nvc0)
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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struct nvc0_program *vp = nvc0->vertprog;
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if (nvc0->clip.nr > vp->vp.num_ucps) {
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assert(nvc0->clip.nr <= 6);
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vp->vp.num_ucps = 6;
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if (vp->translated)
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nvc0_program_destroy(nvc0, vp);
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}
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if (!nvc0_program_validate(nvc0, vp))
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return;
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@ -699,8 +699,13 @@ nvc0_set_clip_state(struct pipe_context *pipe,
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const struct pipe_clip_state *clip)
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{
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struct nvc0_context *nvc0 = nvc0_context(pipe);
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const unsigned size = clip->nr * sizeof(clip->ucp[0]);
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memcpy(&nvc0->clip.ucp[0][0], &clip->ucp[0][0], size);
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nvc0->clip.nr = clip->nr;
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nvc0->clip.depth_clamp = clip->depth_clamp;
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nvc0->dirty |= NVC0_NEW_CLIP;
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}
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@ -193,6 +193,23 @@ nvc0_validate_clip(struct nvc0_context *nvc0)
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BEGIN_RING(chan, RING_3D(VIEW_VOLUME_CLIP_CTRL), 1);
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OUT_RING (chan, clip);
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if (nvc0->clip.nr) {
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struct nouveau_bo *bo = nvc0->screen->uniforms;
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BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
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OUT_RING (chan, 256);
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OUT_RELOCh(chan, bo, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCl(chan, bo, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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BEGIN_RING_1I(chan, RING_3D(CB_POS), nvc0->clip.nr * 4 + 1);
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OUT_RING (chan, 0);
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OUT_RINGp (chan, &nvc0->clip.ucp[0][0], nvc0->clip.nr * 4);
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BEGIN_RING(chan, RING_3D(VP_CLIP_DISTANCE_ENABLE), 1);
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OUT_RING (chan, (1 << nvc0->clip.nr) - 1);
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} else {
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INLIN_RING(chan, RING_3D(VP_CLIP_DISTANCE_ENABLE), 0);
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}
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}
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static void
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@ -111,6 +111,7 @@ struct bld_context {
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struct bld_register ovs[BLD_MAX_OUTPS][4]; /* TGSI_FILE_OUTPUT, FP only */
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uint32_t outputs_written[(PIPE_MAX_SHADER_OUTPUTS + 7) / 8];
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int hpos_index;
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struct nv_value *zero;
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struct nv_value *frag_coord[4];
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@ -903,6 +904,38 @@ bld_is_output_written(struct bld_context *bld, int i, int c)
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return bld->outputs_written[i / 8] & (1 << ((i * 4 + c) % 32));
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}
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static void
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bld_append_vp_ucp(struct bld_context *bld)
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{
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struct nv_value *res[6];
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struct nv_value *ucp, *vtx, *out;
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struct nv_instruction *insn;
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int i, c;
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assert(bld->ti->prog->vp.num_ucps <= 6);
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for (c = 0; c < 4; ++c) {
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vtx = bld_fetch_global(bld, &bld->ovs[bld->hpos_index][c]);
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for (i = 0; i < bld->ti->prog->vp.num_ucps; ++i) {
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ucp = new_value(bld->pc, NV_FILE_MEM_C(15), 4);
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ucp->reg.address = i * 16 + c * 4;
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if (c == 0)
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res[i] = bld_insn_2(bld, NV_OP_MUL_F32, vtx, ucp);
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else
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res[i] = bld_insn_3(bld, NV_OP_MAD_F32, vtx, ucp, res[i]);
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}
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}
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for (i = 0; i < bld->ti->prog->vp.num_ucps; ++i) {
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(out = new_value(bld->pc, NV_FILE_MEM_V, 4))->reg.address = 0x2c0 + i * 4;
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(insn = new_instruction(bld->pc, NV_OP_EXPORT))->fixed = 1;
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nv_reference(bld->pc, insn, 0, out);
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nv_reference(bld->pc, insn, 1, res[i]);
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}
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}
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static void
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bld_export_fp_outputs(struct bld_context *bld)
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{
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@ -1755,11 +1788,13 @@ bld_instruction(struct bld_context *bld,
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/* VP outputs are exported in-place as scalars, optimization later */
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if (bld->pc->is_fragprog)
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bld_export_fp_outputs(bld);
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break;
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if (bld->ti->append_ucp)
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bld_append_vp_ucp(bld);
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return;
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default:
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NOUVEAU_ERR("unhandled opcode %u\n", insn->Instruction.Opcode);
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abort();
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break;
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return;
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}
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if (insn->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
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@ -1767,6 +1802,15 @@ bld_instruction(struct bld_context *bld,
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struct nv_instruction *mi = NULL;
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uint size;
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if (bld->ti->append_ucp) {
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if (bld->ti->output_loc[insn->Dst[0].Register.Index][0] == 0x70) {
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bld->hpos_index = insn->Dst[0].Register.Index;
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for (c = 0; c < 4; ++c)
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if (mask & (1 << c))
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STORE_OUTP(insn->Dst[0].Register.Index, c, dst0[c]);
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}
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}
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for (c = 0; c < 4; ++c)
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if ((mask & (1 << c)) &&
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((dst0[c]->reg.file == NV_FILE_IMM) ||
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