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panfrost: port to common stats framework
this adds full support for executable statistics in panvk. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Acked-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33921>
This commit is contained in:
Alyssa Rosenzweig
Marge Bot
parent
7b1f1a107e
commit
4da7b12000
7 changed files with 167 additions and 148 deletions
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@ -36,6 +36,7 @@
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#include "nir_serialize.h"
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#include "pan_bo.h"
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#include "pan_context.h"
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#include "shader_enums.h"
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static struct panfrost_uncompiled_shader *
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panfrost_alloc_shader(const nir_shader *nir)
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@ -128,7 +129,6 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
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pan_shader_preprocess(s, panfrost_device_gpu_id(dev));
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struct panfrost_compile_inputs inputs = {
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.debug = dbg,
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.gpu_id = panfrost_device_gpu_id(dev),
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};
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@ -201,6 +201,14 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
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screen->vtbl.compile_shader(s, &inputs, &out->binary, &out->info);
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panfrost_stats_util_debug(dbg, gl_shader_stage_name(s->info.stage),
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&out->info.stats);
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if (s->info.stage == MESA_SHADER_VERTEX && out->info.vs.idvs) {
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panfrost_stats_util_debug(dbg, "MESA_SHADER_POSITION",
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&out->info.stats_idvs_varying);
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}
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assert(req_local_mem >= out->info.wls_size);
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out->info.wls_size = req_local_mem;
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@ -28,6 +28,7 @@
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#include "compiler/glsl/glsl_to_nir.h"
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#include "compiler/glsl_types.h"
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#include "compiler/nir/nir_builder.h"
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#include "panfrost/util/pan_ir.h"
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#include "util/u_debug.h"
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#include "bifrost/disassemble.h"
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@ -4737,10 +4738,10 @@ bi_shader_stage_name(bi_context *ctx)
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return gl_shader_stage_name(ctx->stage);
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}
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static char *
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bi_print_stats(bi_context *ctx, unsigned size)
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static void
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bi_gather_stats(bi_context *ctx, unsigned size, struct bifrost_stats *out)
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{
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struct bi_stats stats = {0};
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struct bi_stats counts = {0};
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/* Count instructions, clauses, and tuples. Also attempt to construct
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* normalized execution engine cycle counts, using the following ratio:
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@ -4756,57 +4757,46 @@ bi_print_stats(bi_context *ctx, unsigned size)
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bi_foreach_block(ctx, block) {
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bi_foreach_clause_in_block(block, clause) {
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stats.nr_clauses++;
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stats.nr_tuples += clause->tuple_count;
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counts.nr_clauses++;
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counts.nr_tuples += clause->tuple_count;
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for (unsigned i = 0; i < clause->tuple_count; ++i)
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bi_count_tuple_stats(clause, &clause->tuples[i], &stats);
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bi_count_tuple_stats(clause, &clause->tuples[i], &counts);
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}
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}
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float cycles_arith = ((float)stats.nr_arith) / 24.0;
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float cycles_texture = ((float)stats.nr_texture) / 2.0;
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float cycles_varying = ((float)stats.nr_varying) / 16.0;
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float cycles_ldst = ((float)stats.nr_ldst) / 1.0;
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float cycles_message = MAX3(cycles_texture, cycles_varying, cycles_ldst);
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float cycles_bound = MAX2(cycles_arith, cycles_message);
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/* Thread count and register pressure are traded off only on v7 */
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bool full_threads = (ctx->arch == 7 && ctx->info.work_reg_count <= 32);
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unsigned nr_threads = full_threads ? 2 : 1;
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/* Dump stats */
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char *str = ralloc_asprintf(
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NULL,
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"%s shader: "
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"%u inst, %u tuples, %u clauses, "
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"%f cycles, %f arith, %f texture, %f vary, %f ldst, "
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"%u quadwords, %u threads",
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bi_shader_stage_name(ctx), stats.nr_ins, stats.nr_tuples,
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stats.nr_clauses, cycles_bound, cycles_arith, cycles_texture,
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cycles_varying, cycles_ldst, size / 16, nr_threads);
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*out = (struct bifrost_stats){
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.instrs = counts.nr_ins,
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.tuples = counts.nr_tuples,
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.clauses = counts.nr_clauses,
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.arith = ((float)counts.nr_arith) / 24.0,
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.t = ((float)counts.nr_texture) / 2.0,
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.v = ((float)counts.nr_varying) / 16.0,
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.ldst = ((float)counts.nr_ldst) / 1.0,
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.code_size = size,
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.preloads = ctx->arch == 7 ? bi_count_preload_cost(ctx) : 0,
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.threads = full_threads ? 2 : 1,
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.loops = ctx->loop_count,
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.spills = ctx->spills,
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.fills = ctx->fills,
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};
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if (ctx->arch == 7) {
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ralloc_asprintf_append(&str, ", %u preloads", bi_count_preload_cost(ctx));
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}
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ralloc_asprintf_append(&str, ", %u loops, %u:%u spills:fills",
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ctx->loop_count, ctx->spills, ctx->fills);
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return str;
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out->cycles = MAX2(out->arith, MAX3(out->t, out->v, out->ldst));
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}
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static char *
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va_print_stats(bi_context *ctx, unsigned size)
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static void
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va_gather_stats(bi_context *ctx, unsigned size, struct valhall_stats *out)
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{
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unsigned nr_ins = 0;
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struct va_stats stats = {0};
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struct va_stats counts = {0};
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/* Count instructions */
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bi_foreach_instr_global(ctx, I) {
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nr_ins++;
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va_count_instr_stats(I, &stats);
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va_count_instr_stats(I, &counts);
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}
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/* Mali G78 peak performance:
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@ -4818,31 +4808,24 @@ va_print_stats(bi_context *ctx, unsigned size)
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* 4 texture instructions per cycle
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* 1 load/store operation per cycle
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*/
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float cycles_fma = ((float)stats.fma) / 64.0;
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float cycles_cvt = ((float)stats.cvt) / 64.0;
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float cycles_sfu = ((float)stats.sfu) / 16.0;
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float cycles_v = ((float)stats.v) / 16.0;
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float cycles_t = ((float)stats.t) / 4.0;
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float cycles_ls = ((float)stats.ls) / 1.0;
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*out = (struct valhall_stats){
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.instrs = nr_ins,
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.code_size = size,
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.fma = ((float)counts.fma) / 64.0,
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.cvt = ((float)counts.cvt) / 64.0,
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.sfu = ((float)counts.sfu) / 16.0,
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.v = ((float)counts.v) / 16.0,
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.t = ((float)counts.t) / 4.0,
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.ls = ((float)counts.ls) / 1.0,
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.threads = (ctx->info.work_reg_count <= 32) ? 2 : 1,
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.loops = ctx->loop_count,
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.spills = ctx->spills,
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.fills = ctx->fills,
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};
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/* Calculate the bound */
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float cycles = MAX2(MAX3(cycles_fma, cycles_cvt, cycles_sfu),
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MAX3(cycles_v, cycles_t, cycles_ls));
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/* Thread count and register pressure are traded off */
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unsigned nr_threads = (ctx->info.work_reg_count <= 32) ? 2 : 1;
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/* Dump stats */
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return ralloc_asprintf(NULL,
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"%s shader: "
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"%u inst, %f cycles, %f fma, %f cvt, %f sfu, %f v, "
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"%f t, %f ls, %u quadwords, %u threads, %u loops, "
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"%u:%u spills:fills",
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bi_shader_stage_name(ctx), nr_ins, cycles, cycles_fma,
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cycles_cvt, cycles_sfu, cycles_v, cycles_t, cycles_ls,
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size / 16, nr_threads, ctx->loop_count, ctx->spills,
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ctx->fills);
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out->cycles =
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MAX2(MAX3(out->fma, out->cvt, out->sfu), MAX3(out->v, out->t, out->ls));
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}
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static int
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@ -5748,7 +5731,7 @@ static bi_context *
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bi_compile_variant_nir(nir_shader *nir,
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const struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary, struct bi_shader_info info,
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enum bi_idvs_mode idvs)
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struct panfrost_stats *stats, enum bi_idvs_mode idvs)
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{
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bi_context *ctx = rzalloc(NULL, bi_context);
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@ -5985,23 +5968,17 @@ bi_compile_variant_nir(nir_shader *nir,
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fflush(stdout);
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}
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if (!skip_internal &&
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((bifrost_debug & BIFROST_DBG_SHADERDB) || inputs->debug)) {
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char *shaderdb;
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if (ctx->arch >= 9) {
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stats->isa = PANFROST_STAT_VALHALL;
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va_gather_stats(ctx, binary->size - offset, &stats->valhall);
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} else {
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stats->isa = PANFROST_STAT_BIFROST;
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bi_gather_stats(ctx, binary->size - offset, &stats->bifrost);
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}
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if (ctx->arch >= 9) {
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shaderdb = va_print_stats(ctx, binary->size - offset);
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} else {
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shaderdb = bi_print_stats(ctx, binary->size - offset);
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}
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if (bifrost_debug & BIFROST_DBG_SHADERDB)
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fprintf(stderr, "SHADER-DB: %s\n", shaderdb);
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if (inputs->debug)
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util_debug_message(inputs->debug, SHADER_INFO, "%s", shaderdb);
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ralloc_free(shaderdb);
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if ((bifrost_debug & BIFROST_DBG_SHADERDB) && !skip_internal) {
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const char *prefix = bi_shader_stage_name(ctx);
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panfrost_stats_fprintf(stderr, prefix, stats);
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}
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return ctx;
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@ -6034,8 +6011,11 @@ bi_compile_variant(nir_shader *nir,
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* offset, to keep the ABI simple. */
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assert((offset == 0) ^ (idvs == BI_IDVS_VARYING));
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struct panfrost_stats *stats =
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idvs == BI_IDVS_VARYING ? &info->stats_idvs_varying : &info->stats;
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bi_context *ctx =
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bi_compile_variant_nir(nir, inputs, binary, local_info, idvs);
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bi_compile_variant_nir(nir, inputs, binary, local_info, stats, idvs);
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/* A register is preloaded <==> it is live before the first block */
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bi_block *first_block = list_first_entry(&ctx->blocks, bi_block, link);
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@ -30,6 +30,7 @@
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#include "compiler/nir/nir.h"
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#include "panfrost/util/pan_ir.h"
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#include "util/half_float.h"
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#include "util/shader_stats.h"
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#include "util/u_math.h"
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#include "util/u_worklist.h"
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#include "bi_opcodes.h"
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@ -834,6 +835,7 @@ bi_block_add_successor(bi_block *block, bi_block *successor)
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struct bi_shader_info {
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struct panfrost_ubo_push *push;
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struct bifrost_shader_info *bifrost;
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struct panfrost_stats stats;
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unsigned tls_size;
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unsigned work_reg_count;
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unsigned push_offset;
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@ -36,6 +36,7 @@
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#include "compiler/nir/nir_builder.h"
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#include "util/half_float.h"
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#include "util/list.h"
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#include "util/shader_stats.h"
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#include "util/u_debug.h"
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#include "util/u_dynarray.h"
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#include "util/u_math.h"
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@ -49,6 +50,7 @@
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#include "midgard_quirks.h"
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#include "disassemble.h"
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#include "shader_enums.h"
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static const struct debug_named_value midgard_debug_options[] = {
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{"shaders", MIDGARD_DBG_SHADERS, "Dump shaders in NIR and MIR"},
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@ -3155,51 +3157,34 @@ midgard_compile_shader_nir(nir_shader *nir,
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if (binary->size)
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memset(util_dynarray_grow(binary, uint8_t, 16), 0, 16);
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if ((midgard_debug & MIDGARD_DBG_SHADERDB || inputs->debug) &&
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!nir->info.internal) {
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unsigned nr_bundles = 0, nr_ins = 0;
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struct midgard_stats stats = {
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.quadwords = ctx->quadword_count,
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.registers = info->work_reg_count,
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.loops = ctx->loop_count,
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.spills = ctx->spills,
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.fills = ctx->fills,
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};
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/* Count instructions and bundles */
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/* Count instructions and bundles */
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mir_foreach_block(ctx, _block) {
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midgard_block *block = (midgard_block *)_block;
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stats.bundles +=
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util_dynarray_num_elements(&block->bundles, midgard_bundle);
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mir_foreach_block(ctx, _block) {
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midgard_block *block = (midgard_block *)_block;
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nr_bundles +=
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util_dynarray_num_elements(&block->bundles, midgard_bundle);
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mir_foreach_bundle_in_block(block, bun)
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stats.inst += bun->instruction_count;
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}
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mir_foreach_bundle_in_block(block, bun)
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nr_ins += bun->instruction_count;
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}
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/* Calculate thread count. There are certain cutoffs by
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* register count for thread count */
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stats.threads = (stats.registers <= 4) ? 4 : (stats.registers <= 8) ? 2 : 1;
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/* Calculate thread count. There are certain cutoffs by
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* register count for thread count */
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info->stats.isa = PANFROST_STAT_MIDGARD;
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info->stats.midgard = stats;
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unsigned nr_registers = info->work_reg_count;
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unsigned nr_threads = (nr_registers <= 4) ? 4
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: (nr_registers <= 8) ? 2
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: 1;
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char *shaderdb = NULL;
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/* Dump stats */
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asprintf(&shaderdb,
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"%s shader: "
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"%u inst, %u bundles, %u quadwords, "
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"%u registers, %u threads, %u loops, "
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"%u:%u spills:fills",
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ctx->inputs->is_blend ? "PAN_SHADER_BLEND"
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: gl_shader_stage_name(ctx->stage),
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nr_ins, nr_bundles, ctx->quadword_count, nr_registers,
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nr_threads, ctx->loop_count, ctx->spills, ctx->fills);
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if (midgard_debug & MIDGARD_DBG_SHADERDB)
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fprintf(stderr, "SHADER-DB: %s\n", shaderdb);
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if (inputs->debug)
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util_debug_message(inputs->debug, SHADER_INFO, "%s", shaderdb);
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free(shaderdb);
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if ((midgard_debug & MIDGARD_DBG_SHADERDB) && !nir->info.internal) {
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const char *prefix = _mesa_shader_stage_to_abbrev(ctx->stage);
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midgard_stats_fprintf(stderr, prefix, &stats);
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}
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_mesa_hash_table_u64_destroy(ctx->ssa_constants);
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@ -27,6 +27,7 @@
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#include <stdint.h>
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#include "compiler/nir/nir.h"
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#include "util/hash_table.h"
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#include "util/shader_stats.h"
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#include "util/u_dynarray.h"
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/* Indices for named (non-XFB) varyings that are present. These are packed
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@ -95,8 +96,6 @@ unsigned pan_lookup_pushed_ubo(struct panfrost_ubo_push *push, unsigned ubo,
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unsigned offs);
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struct panfrost_compile_inputs {
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struct util_debug_callback *debug;
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unsigned gpu_id;
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bool is_blend, is_blit;
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struct {
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@ -196,6 +195,8 @@ struct pan_shader_info {
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unsigned tls_size;
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unsigned wls_size;
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struct panfrost_stats stats, stats_idvs_varying;
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/* Bit mask of preloaded registers */
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uint64_t preload;
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@ -41,11 +41,13 @@
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#include "spirv/nir_spirv.h"
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#include "util/memstream.h"
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#include "util/mesa-sha1.h"
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#include "util/shader_stats.h"
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#include "util/u_dynarray.h"
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#include "nir_builder.h"
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#include "nir_conversion_builder.h"
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#include "nir_deref.h"
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#include "shader_enums.h"
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#include "vk_graphics_state.h"
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#include "vk_nir_convert_ycbcr.h"
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#include "vk_shader_module.h"
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@ -1416,13 +1418,6 @@ panvk_shader_serialize(struct vk_device *vk_dev,
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return !blob->out_of_memory;
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}
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#define WRITE_STR(field, ...) \
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({ \
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memset(field, 0, sizeof(field)); \
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UNUSED int i = snprintf(field, sizeof(field), __VA_ARGS__); \
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assert(i > 0 && i < sizeof(field)); \
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})
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static VkResult
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||||
panvk_shader_get_executable_properties(
|
||||
UNUSED struct vk_device *device, const struct vk_shader *vk_shader,
|
||||
|
|
@ -1438,10 +1433,20 @@ panvk_shader_get_executable_properties(
|
|||
{
|
||||
props->stages = mesa_to_vk_shader_stage(shader->info.stage);
|
||||
props->subgroupSize = 8;
|
||||
WRITE_STR(props->name, "%s",
|
||||
_mesa_shader_stage_to_string(shader->info.stage));
|
||||
WRITE_STR(props->description, "%s shader",
|
||||
_mesa_shader_stage_to_string(shader->info.stage));
|
||||
VK_COPY_STR(props->name,
|
||||
_mesa_shader_stage_to_string(shader->info.stage));
|
||||
VK_PRINT_STR(props->description, "%s shader",
|
||||
_mesa_shader_stage_to_string(shader->info.stage));
|
||||
}
|
||||
|
||||
if (shader->info.stage == MESA_SHADER_VERTEX && shader->info.vs.idvs) {
|
||||
vk_outarray_append_typed(VkPipelineExecutablePropertiesKHR, &out, props)
|
||||
{
|
||||
props->stages = mesa_to_vk_shader_stage(shader->info.stage);
|
||||
props->subgroupSize = 8;
|
||||
VK_COPY_STR(props->name, "varying");
|
||||
VK_COPY_STR(props->description, "Varying shader");
|
||||
}
|
||||
}
|
||||
|
||||
return vk_outarray_status(&out);
|
||||
|
|
@ -1459,19 +1464,11 @@ panvk_shader_get_executable_statistics(
|
|||
VK_OUTARRAY_MAKE_TYPED(VkPipelineExecutableStatisticKHR, out, statistics,
|
||||
statistic_count);
|
||||
|
||||
assert(executable_index == 0);
|
||||
|
||||
vk_outarray_append_typed(VkPipelineExecutableStatisticKHR, &out, stat)
|
||||
{
|
||||
WRITE_STR(stat->name, "Code Size");
|
||||
WRITE_STR(stat->description,
|
||||
"Size of the compiled shader binary, in bytes");
|
||||
stat->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR;
|
||||
stat->value.u64 = shader->bin_size;
|
||||
}
|
||||
|
||||
/* TODO: more executable statistics (VK_KHR_pipeline_executable_properties) */
|
||||
assert(executable_index == 0 || executable_index == 1);
|
||||
struct panfrost_stats *stats =
|
||||
executable_index ? &shader->info.stats_idvs_varying : &shader->info.stats;
|
||||
|
||||
vk_add_panfrost_stats(out, stats);
|
||||
return vk_outarray_status(&out);
|
||||
}
|
||||
|
||||
|
|
@ -1513,8 +1510,8 @@ panvk_shader_get_executable_internal_representations(
|
|||
vk_outarray_append_typed(VkPipelineExecutableInternalRepresentationKHR,
|
||||
&out, ir)
|
||||
{
|
||||
WRITE_STR(ir->name, "NIR shader");
|
||||
WRITE_STR(ir->description,
|
||||
VK_COPY_STR(ir->name, "NIR shader");
|
||||
VK_COPY_STR(ir->description,
|
||||
"NIR shader before sending to the back-end compiler");
|
||||
if (!write_ir_text(ir, shader->nir_str))
|
||||
incomplete_text = true;
|
||||
|
|
@ -1525,8 +1522,8 @@ panvk_shader_get_executable_internal_representations(
|
|||
vk_outarray_append_typed(VkPipelineExecutableInternalRepresentationKHR,
|
||||
&out, ir)
|
||||
{
|
||||
WRITE_STR(ir->name, "Assembly");
|
||||
WRITE_STR(ir->description, "Final Assembly");
|
||||
VK_COPY_STR(ir->name, "Assembly");
|
||||
VK_COPY_STR(ir->description, "Final Assembly");
|
||||
if (!write_ir_text(ir, shader->asm_str))
|
||||
incomplete_text = true;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,4 +13,50 @@
|
|||
<stat name="Spills">Number of spill (stack store) instructions</stat>
|
||||
<stat name="Fills">Number of fill (stack load) instructions</stat>
|
||||
</isa>
|
||||
|
||||
<family name="Panfrost">
|
||||
<isa name="Midgard">
|
||||
<stat name="Instructions" display="Inst">Instruction count</stat>
|
||||
<stat name="Bundles">Instruction bundles</stat>
|
||||
<stat name="Registers" type="u16">Register usage in vec4s</stat>
|
||||
<stat name="Threads" more="better" type="u16">Maximum number of threads in flight on a compute unit</stat>
|
||||
<stat name="Quadwords">Binary size in quadwords</stat>
|
||||
<stat name="Loops">Number of hardware loops</stat>
|
||||
<stat name="Spills">Number of spill instructions</stat>
|
||||
<stat name="Fills">Number of fill instructions</stat>
|
||||
</isa>
|
||||
|
||||
<isa name="Bifrost">
|
||||
<stat name="Instructions" display="Instrs">Instruction count</stat>
|
||||
<stat name="Tuples">Tuple count</stat>
|
||||
<stat name="Clauses">Clause count</stat>
|
||||
<stat name="Cycles" type="float">Estimated normalized cycles</stat>
|
||||
<stat name="Arithmetic" display="Arith" type="float">Estimated normalized arithmetic cycles</stat>
|
||||
<stat name="Texture" display="T" type="float">Estimated normalized Texture cycles</stat>
|
||||
<stat name="Load/store" display="LDST" type="float">Estimated normalized Load/Store cycles</stat>
|
||||
<stat name="Varying" display="V" type="float">Estimated normalized Varying cycles</stat>
|
||||
<stat name="Preloads" type="u16">Preload count</stat>
|
||||
<stat name="Threads" more="better" type="u16">Maximum number of threads in flight on a compute unit</stat>
|
||||
<stat name="Code size">Binary size in bytes</stat>
|
||||
<stat name="Loops">Number of hardware loops</stat>
|
||||
<stat name="Spills">Number of spill instructions</stat>
|
||||
<stat name="Fills">Number of fill instructions</stat>
|
||||
</isa>
|
||||
|
||||
<isa name="Valhall">
|
||||
<stat name="Instructions" display="Instrs">Instruction count</stat>
|
||||
<stat name="Cycles" type="float">Estimated normalized cycles</stat>
|
||||
<stat name="FMA" type="float">Estimated normalized FMA (Fused Multiply-Add) cycles</stat>
|
||||
<stat name="CVT" type="float">Estimated normalized CVT (ConVerT) cycles</stat>
|
||||
<stat name="SFU" type="float">Estimated normalized SFU (Special Function Unit) cycles</stat>
|
||||
<stat name="Varying" display="V" type="float">Estimated normalized Varying cycles</stat>
|
||||
<stat name="Texture" display="T" type="float">Estimated normalized Texture cycles</stat>
|
||||
<stat name="Load/store" display="LS" type="float">Estimated normalized Load/Store cycles</stat>
|
||||
<stat name="Code size">Binary size in bytes</stat>
|
||||
<stat name="Threads" more="better" type="u16">Maximum number of threads in flight on a compute unit</stat>
|
||||
<stat name="Loops">Number of hardware loops</stat>
|
||||
<stat name="Spills">Number of spill instructions</stat>
|
||||
<stat name="Fills">Number of fill instructions</stat>
|
||||
</isa>
|
||||
</family>
|
||||
</shaderdb>
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue