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iris: Rename screen->compiler to screen->brw
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
This commit is contained in:
parent
9294afe7fd
commit
4c3b65ccf9
7 changed files with 24 additions and 24 deletions
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@ -232,7 +232,7 @@ iris_init_batch(struct iris_context *ice,
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const unsigned decode_flags = INTEL_BATCH_DECODE_DEFAULT_FLAGS |
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(INTEL_DEBUG(DEBUG_COLOR) ? INTEL_BATCH_DECODE_IN_COLOR : 0);
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intel_batch_decode_ctx_init_brw(&batch->decoder, &screen->compiler->isa,
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intel_batch_decode_ctx_init_brw(&batch->decoder, &screen->brw->isa,
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screen->devinfo,
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stderr, decode_flags, NULL,
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decode_get_bo, decode_get_state_size, batch);
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@ -509,7 +509,7 @@ genX(init_blorp)(struct iris_context *ice)
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{
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struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
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blorp_init_brw(&ice->blorp, ice, &screen->isl_dev, screen->compiler, NULL);
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blorp_init_brw(&ice->blorp, ice, &screen->isl_dev, screen->brw, NULL);
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ice->blorp.lookup_shader = iris_blorp_lookup_shader;
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ice->blorp.upload_shader = iris_blorp_upload_shader;
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ice->blorp.exec = iris_blorp_exec;
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@ -280,7 +280,7 @@ iris_disk_cache_init(struct iris_screen *screen)
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/* array length = strlen("iris_") + sha + nul char */
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char renderer[5 + 40 + 1] = {0};
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char device_info_sha[41];
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brw_device_sha1(device_info_sha, screen->compiler->devinfo);
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brw_device_sha1(device_info_sha, screen->brw->devinfo);
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memcpy(renderer, "iris_", 5);
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memcpy(renderer + 5, device_info_sha, 40);
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@ -295,7 +295,7 @@ iris_disk_cache_init(struct iris_screen *screen)
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_mesa_sha1_format(timestamp, id_sha1);
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const uint64_t driver_flags =
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brw_get_compiler_config_value(screen->compiler);
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brw_get_compiler_config_value(screen->brw);
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screen->disk_cache = disk_cache_create(renderer, timestamp, driver_flags);
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#endif
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}
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@ -73,7 +73,7 @@ static nir_shader *
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load_shader_lib(struct iris_screen *screen, void *mem_ctx)
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{
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const nir_shader_compiler_options *nir_options =
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screen->compiler->nir_options[MESA_SHADER_KERNEL];
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screen->brw->nir_options[MESA_SHADER_KERNEL];
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struct blob_reader blob;
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blob_reader_init(&blob, (void *)genX(intel_shaders_nir),
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@ -1300,7 +1300,7 @@ iris_debug_recompile(struct iris_screen *screen,
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|| list_is_singular(&ish->variants))
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return;
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const struct brw_compiler *c = screen->compiler;
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const struct brw_compiler *c = screen->brw;
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const struct shader_info *info = &ish->nir->info;
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brw_shader_perf_log(c, dbg, "Recompiling %s shader for program %s: %s\n",
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@ -1490,7 +1490,7 @@ iris_compile_vs(struct iris_screen *screen,
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struct iris_uncompiled_shader *ish,
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struct iris_compiled_shader *shader)
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{
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const struct brw_compiler *compiler = screen->compiler;
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const struct brw_compiler *compiler = screen->brw;
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const struct intel_device_info *devinfo = screen->devinfo;
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void *mem_ctx = ralloc_context(NULL);
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uint32_t *system_values;
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@ -1677,7 +1677,7 @@ iris_compile_tcs(struct iris_screen *screen,
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struct iris_uncompiled_shader *ish,
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struct iris_compiled_shader *shader)
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{
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const struct brw_compiler *compiler = screen->compiler;
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const struct brw_compiler *compiler = screen->brw;
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void *mem_ctx = ralloc_context(NULL);
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const struct intel_device_info *devinfo = screen->devinfo;
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uint32_t *system_values = NULL;
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@ -1838,7 +1838,7 @@ iris_compile_tes(struct iris_screen *screen,
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struct iris_uncompiled_shader *ish,
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struct iris_compiled_shader *shader)
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{
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const struct brw_compiler *compiler = screen->compiler;
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const struct brw_compiler *compiler = screen->brw;
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void *mem_ctx = ralloc_context(NULL);
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uint32_t *system_values;
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const struct intel_device_info *devinfo = screen->devinfo;
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@ -1982,7 +1982,7 @@ iris_compile_gs(struct iris_screen *screen,
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struct iris_uncompiled_shader *ish,
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struct iris_compiled_shader *shader)
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{
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const struct brw_compiler *compiler = screen->compiler;
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const struct brw_compiler *compiler = screen->brw;
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const struct intel_device_info *devinfo = screen->devinfo;
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void *mem_ctx = ralloc_context(NULL);
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uint32_t *system_values;
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@ -2122,7 +2122,7 @@ iris_compile_fs(struct iris_screen *screen,
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struct iris_compiled_shader *shader,
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struct intel_vue_map *vue_map)
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{
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const struct brw_compiler *compiler = screen->compiler;
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const struct brw_compiler *compiler = screen->brw;
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void *mem_ctx = ralloc_context(NULL);
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uint32_t *system_values;
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const struct intel_device_info *devinfo = screen->devinfo;
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@ -2420,7 +2420,7 @@ iris_compile_cs(struct iris_screen *screen,
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struct iris_uncompiled_shader *ish,
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struct iris_compiled_shader *shader)
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{
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const struct brw_compiler *compiler = screen->compiler;
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const struct brw_compiler *compiler = screen->brw;
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void *mem_ctx = ralloc_context(NULL);
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uint32_t *system_values;
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const struct intel_device_info *devinfo = screen->devinfo;
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@ -2677,7 +2677,7 @@ iris_create_compute_state(struct pipe_context *ctx,
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struct iris_screen *screen = (void *) ctx->screen;
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struct u_upload_mgr *uploader = ice->shaders.uploader_unsync;
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const nir_shader_compiler_options *options =
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screen->compiler->nir_options[MESA_SHADER_COMPUTE];
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screen->brw->nir_options[MESA_SHADER_COMPUTE];
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nir_shader *nir;
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switch (state->ir_type) {
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@ -3158,7 +3158,7 @@ iris_finalize_nir(struct pipe_screen *_screen, void *nirptr)
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NIR_PASS_V(nir, iris_fix_edge_flags);
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struct brw_nir_compiler_opts opts = {};
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brw_preprocess_nir(screen->compiler, nir, &opts);
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brw_preprocess_nir(screen->brw, nir, &opts);
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NIR_PASS_V(nir, brw_nir_lower_storage_image,
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&(struct brw_nir_lower_storage_image_opts) {
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@ -3279,7 +3279,7 @@ iris_fs_barycentric_modes(const struct iris_compiled_shader *shader,
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bool
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iris_use_tcs_multi_patch(struct iris_screen *screen)
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{
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return screen->compiler->use_tcs_multi_patch;
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return screen->brw->use_tcs_multi_patch;
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}
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bool
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@ -3332,7 +3332,7 @@ iris_get_compiler_options(struct pipe_screen *pscreen,
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gl_shader_stage stage = stage_from_pipe(pstage);
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assert(ir == PIPE_SHADER_IR_NIR);
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return screen->compiler->nir_options[stage];
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return screen->brw->nir_options[stage];
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}
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void
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@ -3341,9 +3341,9 @@ iris_compiler_init(struct iris_screen *screen)
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STATIC_ASSERT(IRIS_MAX_DRAW_BUFFERS == BRW_MAX_DRAW_BUFFERS);
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STATIC_ASSERT(IRIS_MAX_SOL_BINDINGS == BRW_MAX_SOL_BINDINGS);
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screen->compiler = brw_compiler_create(screen, screen->devinfo);
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screen->compiler->shader_debug_log = iris_shader_debug_log;
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screen->compiler->shader_perf_log = iris_shader_perf_log;
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screen->compiler->supports_shader_constants = true;
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screen->compiler->indirect_ubos_use_sampler = iris_indirect_ubos_use_sampler(screen);
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screen->brw = brw_compiler_create(screen, screen->devinfo);
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screen->brw->shader_debug_log = iris_shader_debug_log;
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screen->brw->shader_perf_log = iris_shader_perf_log;
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screen->brw->supports_shader_constants = true;
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screen->brw->indirect_ubos_use_sampler = iris_indirect_ubos_use_sampler(screen);
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}
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@ -180,7 +180,7 @@ iris_upload_shader(struct iris_screen *screen,
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.value = shader_data_addr >> 32,
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},
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};
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brw_write_shader_relocs(&screen->compiler->isa, shader->map,
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brw_write_shader_relocs(&screen->brw->isa, shader->map,
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shader->brw_prog_data, reloc_values,
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ARRAY_SIZE(reloc_values));
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@ -331,7 +331,7 @@ iris_ensure_indirect_generation_shader(struct iris_batch *batch)
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if (ice->draw.generation.shader != NULL)
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return;
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struct brw_compiler *compiler = screen->compiler;
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struct brw_compiler *compiler = screen->brw;
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const nir_shader_compiler_options *nir_options =
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compiler->nir_options[MESA_SHADER_FRAGMENT];
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@ -225,7 +225,7 @@ struct iris_screen {
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const struct intel_device_info *devinfo;
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struct isl_device isl_dev;
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struct iris_bufmgr *bufmgr;
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struct brw_compiler *compiler;
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struct brw_compiler *brw;
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struct intel_perf_config *perf_cfg;
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const struct intel_l3_config *l3_config_3d;
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