util: fix (re-enable) L3 cache pinning

cores_per_L3 was uninitialized, so it was always disabled.
Remove the variable and do it differently.

Fixes: 11d2db17c5 - util: rework AMD cpu L3 cache affinity code.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10526>

src/mesa/main/glthread.c

@@ -216,7 +216,7 @@ _mesa_glthread_flush_batch(struct gl_context *ctx)
    /* Pin threads regularly to the same Zen CCX that the main thread is
     * running on. The main thread can move between CCXs.
     */
-   if (util_get_cpu_caps()->nr_cpus != util_get_cpu_caps()->cores_per_L3 &&
+   if (util_get_cpu_caps()->num_L3_caches > 1 &&
        /* driver support */
        ctx->Driver.PinDriverToL3Cache &&
        ++glthread->pin_thread_counter % 128 == 0) {

src/mesa/state_tracker/st_context.c

@@ -847,7 +847,9 @@ st_create_context_priv(struct gl_context *ctx, struct pipe_context *pipe,
          !st->lower_ucp;
    st->shader_has_one_variant[MESA_SHADER_COMPUTE] = st->has_shareable_shaders;
 
-   if (util_get_cpu_caps()->cores_per_L3 == util_get_cpu_caps()->nr_cpus ||
+   util_cpu_detect();
+
+   if (util_get_cpu_caps()->num_L3_caches == 1 ||
        !st->pipe->set_context_param)
       st->pin_thread_counter = ST_L3_PINNING_DISABLED;
 

src/util/u_cpu_detect.c

@@ -435,7 +435,6 @@ static void
 get_cpu_topology(void)
 {
    /* Default. This is OK if L3 is not present or there is only one. */
-   util_cpu_caps.cores_per_L3 = util_cpu_caps.nr_cpus;
    util_cpu_caps.num_L3_caches = 1;
 
    memset(util_cpu_caps.cpu_to_L3, 0xff, sizeof(util_cpu_caps.cpu_to_L3));

src/util/u_cpu_detect.h

@@ -97,7 +97,6 @@ struct util_cpu_caps_t {
    unsigned has_avx512vbmi:1;
 
    unsigned num_L3_caches;
-   unsigned cores_per_L3;
    unsigned num_cpu_mask_bits;
 
    uint16_t cpu_to_L3[UTIL_MAX_CPUS];