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intel/fs: fix per vertex input clamping
Only apply the clamp in multi patch mode (where the input vertices vary between [1, 32]). The clamp NIR pass operates on lowered intrinsics so we need to call it after the inputs have been lowered. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes:e25e17dd0c("intel/fs: clamp per vertex input accesses to patchControlPoints") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8912 Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22701> (cherry picked from commit7ddc31c672)
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parent
2d24f535ae
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46d57d5de9
2 changed files with 3 additions and 3 deletions
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@ -904,7 +904,7 @@
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"description": "intel/fs: fix per vertex input clamping",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": "e25e17dd0c39675acd48fd4a6982fcd77530ef2c"
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},
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@ -365,8 +365,6 @@ brw_compile_tcs(const struct brw_compiler *compiler,
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const bool debug_enabled = INTEL_DEBUG(DEBUG_TCS);
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const unsigned *assembly;
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brw_nir_clamp_per_vertex_loads(nir, key->input_vertices);
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vue_prog_data->base.stage = MESA_SHADER_TESS_CTRL;
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prog_data->base.base.ray_queries = nir->info.ray_queries;
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prog_data->base.base.total_scratch = 0;
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@ -387,6 +385,8 @@ brw_compile_tcs(const struct brw_compiler *compiler,
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key->_tes_primitive_mode);
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if (key->quads_workaround)
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brw_nir_apply_tcs_quads_workaround(nir);
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if (compiler->use_tcs_multi_patch)
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brw_nir_clamp_per_vertex_loads(nir, key->input_vertices);
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brw_postprocess_nir(nir, compiler, is_scalar, debug_enabled,
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key->base.robust_buffer_access);
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