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radeonsi: clean up primitive binning enablement
no change in behavior. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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parent
8eb8be3f54
commit
442dae2693
1 changed files with 16 additions and 11 deletions
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@ -1032,21 +1032,26 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
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sscreen->info.family == CHIP_RAVEN;
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sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2;
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/* Only enable primitive binning on APUs by default. */
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sscreen->dpbb_allowed = sscreen->info.family == CHIP_RAVEN ||
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sscreen->info.family == CHIP_RAVEN2;
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sscreen->dfsm_allowed = sscreen->info.family == CHIP_RAVEN ||
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sscreen->info.family == CHIP_RAVEN2;
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/* Process DPBB enable flags. */
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if (sscreen->debug_flags & DBG(DPBB)) {
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sscreen->dpbb_allowed = true;
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} else {
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/* Only enable primitive binning on APUs by default. */
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/* TODO: Investigate if binning is profitable on Vega12. */
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sscreen->dpbb_allowed = !(sscreen->debug_flags & DBG(NO_DPBB)) &&
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(sscreen->info.family == CHIP_RAVEN ||
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sscreen->info.family == CHIP_RAVEN2);
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if (sscreen->debug_flags & DBG(DFSM))
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sscreen->dfsm_allowed = true;
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}
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if (sscreen->debug_flags & DBG(DFSM)) {
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sscreen->dfsm_allowed = sscreen->dpbb_allowed;
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} else {
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sscreen->dfsm_allowed = sscreen->dpbb_allowed &&
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!(sscreen->debug_flags & DBG(NO_DFSM));
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/* Process DPBB disable flags. */
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if (sscreen->debug_flags & DBG(NO_DPBB)) {
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sscreen->dpbb_allowed = false;
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sscreen->dfsm_allowed = false;
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} else if (sscreen->debug_flags & DBG(NO_DFSM)) {
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sscreen->dfsm_allowed = false;
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}
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/* While it would be nice not to have this flag, we are constrained
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