fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-21 11:30:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

amd: support load_front_face_fsign

Browse source 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32791>
This commit is contained in:
Georg Lehmann 2024-12-27 19:00:40 +01:00 • committed by Marge Bot
parent 15d754fefa
commit 43fca7fffe
6 changed files with 17 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -8145,6 +8145,10 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr)
Operand::zero(), get_arg(ctx, ctx->args->front_face)); Operand::zero(), get_arg(ctx, ctx->args->front_face));
break; break;
} }
case nir_intrinsic_load_front_face_fsign: {
bld.copy(Definition(get_ssa_temp(ctx, &instr->def)), get_arg(ctx, ctx->args->front_face));
break;
}
case nir_intrinsic_load_view_index: { case nir_intrinsic_load_view_index: {
Temp dst = get_ssa_temp(ctx, &instr->def); Temp dst = get_ssa_temp(ctx, &instr->def);
bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->view_index))); bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->view_index)));

1
src/amd/compiler/aco_instruction_selection_setup.cpp
View file

@ -559,6 +559,7 @@ init_context(isel_context* ctx, nir_shader* shader)
case nir_intrinsic_load_barycentric_centroid: case nir_intrinsic_load_barycentric_centroid:
case nir_intrinsic_load_barycentric_at_offset: case nir_intrinsic_load_barycentric_at_offset:
case nir_intrinsic_load_interpolated_input: case nir_intrinsic_load_interpolated_input:
case nir_intrinsic_load_front_face_fsign:
case nir_intrinsic_load_frag_coord: case nir_intrinsic_load_frag_coord:
case nir_intrinsic_load_pixel_coord: case nir_intrinsic_load_pixel_coord:
case nir_intrinsic_load_frag_shading_rate: case nir_intrinsic_load_frag_shading_rate:

3
src/amd/llvm/ac_nir_to_llvm.c
View file

@ -3045,6 +3045,9 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
result = emit_float_cmp(&ctx->ac, LLVMRealOLT, ctx->ac.f32_0, result = emit_float_cmp(&ctx->ac, LLVMRealOLT, ctx->ac.f32_0,
ac_get_arg(&ctx->ac, ctx->args->front_face)); ac_get_arg(&ctx->ac, ctx->args->front_face));
break; break;
case nir_intrinsic_load_front_face_fsign:
result = ac_get_arg(&ctx->ac, ctx->args->front_face);
break;
case nir_intrinsic_load_helper_invocation: case nir_intrinsic_load_helper_invocation:
case nir_intrinsic_is_helper_invocation: case nir_intrinsic_is_helper_invocation:
result = ac_build_load_helper_invocation(&ctx->ac); result = ac_build_load_helper_invocation(&ctx->ac);

3
src/amd/vulkan/radv_shader_info.c
View file

@ -960,7 +960,8 @@ gather_shader_info_fs(const struct radv_device *device, const nir_shader *nir,
info->ps.reads_sample_mask_in = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_MASK_IN); info->ps.reads_sample_mask_in = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_MASK_IN);
info->ps.reads_sample_id = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_ID); info->ps.reads_sample_id = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_ID);
info->ps.reads_frag_shading_rate = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRAG_SHADING_RATE); info->ps.reads_frag_shading_rate = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRAG_SHADING_RATE);
info->ps.reads_front_face = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE); info->ps.reads_front_face = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE) |
BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE_FSIGN);
info->ps.reads_barycentric_model = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BARYCENTRIC_PULL_MODEL); info->ps.reads_barycentric_model = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BARYCENTRIC_PULL_MODEL);
info->ps.reads_fully_covered = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FULLY_COVERED); info->ps.reads_fully_covered = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FULLY_COVERED);

6
src/gallium/drivers/radeonsi/si_nir_lower_abi.c
View file

@ -603,9 +603,13 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s
replacement = ac_nir_load_arg(b, &args->ac, args->alpha_reference); replacement = ac_nir_load_arg(b, &args->ac, args->alpha_reference);
break; break;
case nir_intrinsic_load_front_face: case nir_intrinsic_load_front_face:
case nir_intrinsic_load_front_face_fsign:
if (!key->ps.opt.force_front_face_input) if (!key->ps.opt.force_front_face_input)
return false; return false;
replacement = nir_imm_bool(b, key->ps.opt.force_front_face_input == 1); if (intrin->intrinsic == nir_intrinsic_load_front_face)
replacement = nir_imm_bool(b, key->ps.opt.force_front_face_input == 1);
else
replacement = nir_imm_float(b, key->ps.opt.force_front_face_input == 1 ? 1.0 : -1.0);
break; break;
case nir_intrinsic_load_barycentric_optimize_amd: { case nir_intrinsic_load_barycentric_optimize_amd: {
nir_def *prim_mask = ac_nir_load_arg(b, &args->ac, args->ac.prim_mask); nir_def *prim_mask = ac_nir_load_arg(b, &args->ac, args->ac.prim_mask);

3
src/gallium/drivers/radeonsi/si_shader_info.c
View file

@ -595,7 +595,8 @@ void si_nir_scan_shader(struct si_screen *sscreen, struct nir_shader *nir,
(BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER) | (BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER) |
BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER)); BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER));
info->uses_frontface = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE); info->uses_frontface = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE) |
BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE_FSIGN);
info->uses_instanceid = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_INSTANCE_ID); info->uses_instanceid = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_INSTANCE_ID);
info->uses_base_vertex = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BASE_VERTEX); info->uses_base_vertex = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BASE_VERTEX);
info->uses_base_instance = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BASE_INSTANCE); info->uses_base_instance = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BASE_INSTANCE);