From 43fca7fffe791fba32f7cee1b51b00f69cc32424 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Fri, 27 Dec 2024 19:00:40 +0100 Subject: [PATCH] amd: support load_front_face_fsign MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 4 ++++ src/amd/compiler/aco_instruction_selection_setup.cpp | 1 + src/amd/llvm/ac_nir_to_llvm.c | 3 +++ src/amd/vulkan/radv_shader_info.c | 3 ++- src/gallium/drivers/radeonsi/si_nir_lower_abi.c | 6 +++++- src/gallium/drivers/radeonsi/si_shader_info.c | 3 ++- 6 files changed, 17 insertions(+), 3 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 1c3b1e9f2cd..2938141ff3f 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -8145,6 +8145,10 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) Operand::zero(), get_arg(ctx, ctx->args->front_face)); break; } + case nir_intrinsic_load_front_face_fsign: { + bld.copy(Definition(get_ssa_temp(ctx, &instr->def)), get_arg(ctx, ctx->args->front_face)); + break; + } case nir_intrinsic_load_view_index: { Temp dst = get_ssa_temp(ctx, &instr->def); bld.copy(Definition(dst), Operand(get_arg(ctx, ctx->args->view_index))); diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index 25cc5f7aadf..4d81ad0c9c1 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -559,6 +559,7 @@ init_context(isel_context* ctx, nir_shader* shader) case nir_intrinsic_load_barycentric_centroid: case nir_intrinsic_load_barycentric_at_offset: case nir_intrinsic_load_interpolated_input: + case nir_intrinsic_load_front_face_fsign: case nir_intrinsic_load_frag_coord: case nir_intrinsic_load_pixel_coord: case nir_intrinsic_load_frag_shading_rate: diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index 4824285c073..eade2c46537 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -3045,6 +3045,9 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins result = emit_float_cmp(&ctx->ac, LLVMRealOLT, ctx->ac.f32_0, ac_get_arg(&ctx->ac, ctx->args->front_face)); break; + case nir_intrinsic_load_front_face_fsign: + result = ac_get_arg(&ctx->ac, ctx->args->front_face); + break; case nir_intrinsic_load_helper_invocation: case nir_intrinsic_is_helper_invocation: result = ac_build_load_helper_invocation(&ctx->ac); diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index eee82533b41..3fd92d34e6f 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -960,7 +960,8 @@ gather_shader_info_fs(const struct radv_device *device, const nir_shader *nir, info->ps.reads_sample_mask_in = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_MASK_IN); info->ps.reads_sample_id = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_ID); info->ps.reads_frag_shading_rate = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRAG_SHADING_RATE); - info->ps.reads_front_face = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE); + info->ps.reads_front_face = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE) | + BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE_FSIGN); info->ps.reads_barycentric_model = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BARYCENTRIC_PULL_MODEL); info->ps.reads_fully_covered = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FULLY_COVERED); diff --git a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c index 3a6012928e5..0608b7c9ee3 100644 --- a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c +++ b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c @@ -603,9 +603,13 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s replacement = ac_nir_load_arg(b, &args->ac, args->alpha_reference); break; case nir_intrinsic_load_front_face: + case nir_intrinsic_load_front_face_fsign: if (!key->ps.opt.force_front_face_input) return false; - replacement = nir_imm_bool(b, key->ps.opt.force_front_face_input == 1); + if (intrin->intrinsic == nir_intrinsic_load_front_face) + replacement = nir_imm_bool(b, key->ps.opt.force_front_face_input == 1); + else + replacement = nir_imm_float(b, key->ps.opt.force_front_face_input == 1 ? 1.0 : -1.0); break; case nir_intrinsic_load_barycentric_optimize_amd: { nir_def *prim_mask = ac_nir_load_arg(b, &args->ac, args->ac.prim_mask); diff --git a/src/gallium/drivers/radeonsi/si_shader_info.c b/src/gallium/drivers/radeonsi/si_shader_info.c index 18d443f1c9e..5f3161c5a79 100644 --- a/src/gallium/drivers/radeonsi/si_shader_info.c +++ b/src/gallium/drivers/radeonsi/si_shader_info.c @@ -595,7 +595,8 @@ void si_nir_scan_shader(struct si_screen *sscreen, struct nir_shader *nir, (BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_INNER) | BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER)); - info->uses_frontface = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE); + info->uses_frontface = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE) | + BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_FRONT_FACE_FSIGN); info->uses_instanceid = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_INSTANCE_ID); info->uses_base_vertex = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BASE_VERTEX); info->uses_base_instance = BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_BASE_INSTANCE);