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radv/rt: use terminate() when returning from raygen shaders
Q2RTX stats: Totals from 7 (0.01% of 134913) affected shaders: CodeSize: 204712 -> 204744 (+0.02%); split: -0.06%, +0.07% Instrs: 37526 -> 37522 (-0.01%); split: -0.07%, +0.06% Latency: 950563 -> 956024 (+0.57%) InvThroughput: 187915 -> 188977 (+0.57%) Copies: 4829 -> 4763 (-1.37%) Branches: 1570 -> 1583 (+0.83%) PreSGPRs: 407 -> 400 (-1.72%) PreVGPRs: 614 -> 617 (+0.49%) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21736>
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parent
cd1e5b1858
commit
41ae2d0725
2 changed files with 4 additions and 8 deletions
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@ -2249,8 +2249,9 @@ lower_to_hw_instr(Program* program)
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if (program->gfx_level >= GFX11)
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target =
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program->has_color_exports ? V_008DFC_SQ_EXP_MRT : V_008DFC_SQ_EXP_MRTZ;
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bld.exp(aco_opcode::exp, Operand(v1), Operand(v1), Operand(v1), Operand(v1), 0,
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target, false, true, true);
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if (program->stage == fragment_fs)
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bld.exp(aco_opcode::exp, Operand(v1), Operand(v1), Operand(v1), Operand(v1),
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0, target, false, true, true);
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if (should_dealloc_vgprs)
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bld.sopp(aco_opcode::s_sendmsg, -1, sendmsg_dealloc_vgprs);
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bld.sopp(aco_opcode::s_endpgm);
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@ -375,7 +375,7 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
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}
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case nir_intrinsic_rt_return_amd: {
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if (shader->info.stage == MESA_SHADER_RAYGEN) {
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nir_store_var(&b_shader, vars->idx, nir_imm_int(&b_shader, 0), 1);
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nir_terminate(&b_shader);
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break;
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}
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insert_rt_return(&b_shader, vars);
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@ -1588,11 +1588,6 @@ create_rt_shader(struct radv_device *device, const VkRayTracingPipelineCreateInf
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nir_store_var(&b, vars.launch_size, nir_vec(&b, xyz, 3), 0x7);
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nir_loop *loop = nir_push_loop(&b);
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nir_push_if(&b, nir_ieq_imm(&b, nir_load_var(&b, vars.idx), 0));
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nir_jump(&b, nir_jump_break);
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nir_pop_if(&b, NULL);
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nir_ssa_def *idx = nir_load_var(&b, vars.idx);
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/* Insert traversal shader */
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