diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index af26eadfd28..4bba62f8605 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -2249,8 +2249,9 @@ lower_to_hw_instr(Program* program) if (program->gfx_level >= GFX11) target = program->has_color_exports ? V_008DFC_SQ_EXP_MRT : V_008DFC_SQ_EXP_MRTZ; - bld.exp(aco_opcode::exp, Operand(v1), Operand(v1), Operand(v1), Operand(v1), 0, - target, false, true, true); + if (program->stage == fragment_fs) + bld.exp(aco_opcode::exp, Operand(v1), Operand(v1), Operand(v1), Operand(v1), + 0, target, false, true, true); if (should_dealloc_vgprs) bld.sopp(aco_opcode::s_sendmsg, -1, sendmsg_dealloc_vgprs); bld.sopp(aco_opcode::s_endpgm); diff --git a/src/amd/vulkan/radv_rt_shader.c b/src/amd/vulkan/radv_rt_shader.c index bb551160ce1..c60c5f9fdb8 100644 --- a/src/amd/vulkan/radv_rt_shader.c +++ b/src/amd/vulkan/radv_rt_shader.c @@ -375,7 +375,7 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca } case nir_intrinsic_rt_return_amd: { if (shader->info.stage == MESA_SHADER_RAYGEN) { - nir_store_var(&b_shader, vars->idx, nir_imm_int(&b_shader, 0), 1); + nir_terminate(&b_shader); break; } insert_rt_return(&b_shader, vars); @@ -1588,11 +1588,6 @@ create_rt_shader(struct radv_device *device, const VkRayTracingPipelineCreateInf nir_store_var(&b, vars.launch_size, nir_vec(&b, xyz, 3), 0x7); nir_loop *loop = nir_push_loop(&b); - - nir_push_if(&b, nir_ieq_imm(&b, nir_load_var(&b, vars.idx), 0)); - nir_jump(&b, nir_jump_break); - nir_pop_if(&b, NULL); - nir_ssa_def *idx = nir_load_var(&b, vars.idx); /* Insert traversal shader */