nir: add two amd ngg lds base load intrinsics

These two values are not known when compile for radeonsi.
They are relocated when link/upload time.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18832>
This commit is contained in:
Qiang Yu 2022-07-22 15:25:45 +08:00 committed by Marge Bot
parent 54eea0e393
commit 3d6cce2e4c
2 changed files with 7 additions and 0 deletions

View file

@ -198,6 +198,8 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
case nir_intrinsic_load_streamout_buffer_amd:
case nir_intrinsic_load_ordered_id_amd:
case nir_intrinsic_load_provoking_vtx_in_prim_amd:
case nir_intrinsic_load_lds_ngg_scratch_base_amd:
case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd:
is_divergent = false;
break;

View file

@ -1493,6 +1493,11 @@ intrinsic("atomic_add_gs_emit_prim_count_amd", [1])
intrinsic("atomic_add_gen_prim_count_amd", [1], indices=[STREAM_ID])
intrinsic("atomic_add_xfb_prim_count_amd", [1], indices=[STREAM_ID])
# LDS offset for scratch section in NGG shader
system_value("lds_ngg_scratch_base_amd", 1)
# LDS offset for NGG GS shader vertex emit
system_value("lds_ngg_gs_out_vertex_base_amd", 1)
# V3D-specific instrinc for tile buffer color reads.
#
# The hardware requires that we read the samples and components of a pixel