From 3d6cce2e4cce0988271f8dab96c102793c831c75 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Fri, 22 Jul 2022 15:25:45 +0800 Subject: [PATCH] nir: add two amd ngg lds base load intrinsics MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These two values are not known when compile for radeonsi. They are relocated when link/upload time. Reviewed-by: Marek Olšák Signed-off-by: Qiang Yu Part-of: --- src/compiler/nir/nir_divergence_analysis.c | 2 ++ src/compiler/nir/nir_intrinsics.py | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 4f7663cc3b4..4d8dce32099 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -198,6 +198,8 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) case nir_intrinsic_load_streamout_buffer_amd: case nir_intrinsic_load_ordered_id_amd: case nir_intrinsic_load_provoking_vtx_in_prim_amd: + case nir_intrinsic_load_lds_ngg_scratch_base_amd: + case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd: is_divergent = false; break; diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index e29bc2c012a..86d16266696 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -1493,6 +1493,11 @@ intrinsic("atomic_add_gs_emit_prim_count_amd", [1]) intrinsic("atomic_add_gen_prim_count_amd", [1], indices=[STREAM_ID]) intrinsic("atomic_add_xfb_prim_count_amd", [1], indices=[STREAM_ID]) +# LDS offset for scratch section in NGG shader +system_value("lds_ngg_scratch_base_amd", 1) +# LDS offset for NGG GS shader vertex emit +system_value("lds_ngg_gs_out_vertex_base_amd", 1) + # V3D-specific instrinc for tile buffer color reads. # # The hardware requires that we read the samples and components of a pixel