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i965: Let the caller of brw_set_dp_write/read_message control the target cache.

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brw_set_dp_read_message already had a target_cache argument, but its
interpretation was rather convoluted (on Gen6 the render cache was
used if the caller asked for it, otherwise it was ignored using the
sampler cache instead), and the constant cache wasn't representable at
all.  brw_set_dp_write_message used the data cache on Gen7+ except for
RENDER_TARGET_WRITE messages, in which case it would use the render
cache.  On Gen6 the render cache was always used.

Instead of the above, provide the shared unit SFID that the caller
expects will be used.  Makes no functional changes.

v3: Non-trivial rebase.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Francisco Jerez 2015-04-23 14:36:16 +03:00
parent 591e14ec08
commit 3c78d31374
3 changed files with 43 additions and 42 deletions
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1
src/mesa/drivers/dri/i965/brw_eu.h
View file

@ -233,6 +233,7 @@ void brw_set_dp_write_message(struct brw_codegen *p,
unsigned binding_table_index,
unsigned msg_control,
unsigned msg_type,
unsigned target_cache,
unsigned msg_length,
bool header_present,
unsigned last_render_target,

69
src/mesa/drivers/dri/i965/brw_eu_emit.c
View file

@ -706,6 +706,7 @@ brw_set_dp_write_message(struct brw_codegen *p,
unsigned binding_table_index,
unsigned msg_control,
unsigned msg_type,
unsigned target_cache,
unsigned msg_length,
bool header_present,
unsigned last_render_target,
@ -714,20 +715,8 @@ brw_set_dp_write_message(struct brw_codegen *p,
unsigned send_commit_msg)
{
const struct gen_device_info *devinfo = p->devinfo;
unsigned sfid;
if (devinfo->gen >= 7) {
/* Use the Render Cache for RT writes; otherwise use the Data Cache */
if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE)
sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
else
sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
} else if (devinfo->gen == 6) {
/* Use the render cache for all write messages. */
sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
} else {
sfid = BRW_SFID_DATAPORT_WRITE;
}
const unsigned sfid = (devinfo->gen >= 6 ? target_cache :
BRW_SFID_DATAPORT_WRITE);
brw_set_message_descriptor(p, insn, sfid, msg_length, response_length,
header_present, end_of_thread);
@ -753,26 +742,8 @@ brw_set_dp_read_message(struct brw_codegen *p,
unsigned response_length)
{
const struct gen_device_info *devinfo = p->devinfo;
unsigned sfid;
if (devinfo->gen >= 7) {
if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE)
sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
else if (target_cache == BRW_DATAPORT_READ_TARGET_DATA_CACHE)
sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
else if (target_cache == BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE)
sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE;
else
unreachable("Invalid target cache");
} else if (devinfo->gen == 6) {
if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE)
sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
else
sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE;
} else {
sfid = BRW_SFID_DATAPORT_READ;
}
const unsigned sfid = (devinfo->gen >= 6 ? target_cache :
BRW_SFID_DATAPORT_READ);
brw_set_message_descriptor(p, insn, sfid, msg_length, response_length,
header_present, false);
@ -2073,6 +2044,10 @@ void brw_oword_block_write_scratch(struct brw_codegen *p,
unsigned offset)
{
const struct gen_device_info *devinfo = p->devinfo;
const unsigned target_cache =
(devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE :
devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE :
BRW_DATAPORT_READ_TARGET_RENDER_CACHE);
uint32_t msg_type;
if (devinfo->gen >= 6)
@ -2161,6 +2136,7 @@ void brw_oword_block_write_scratch(struct brw_codegen *p,
brw_scratch_surface_idx(p),
msg_control,
msg_type,
target_cache,
mlen,
true, /* header_present */
0, /* not a render target */
@ -2210,9 +2186,10 @@ brw_oword_block_read_scratch(struct brw_codegen *p,
num_regs == 2 ? BRW_DATAPORT_OWORD_BLOCK_4_OWORDS :
num_regs == 4 ? BRW_DATAPORT_OWORD_BLOCK_8_OWORDS : 0);
assert(msg_control);
const unsigned target_cache = devinfo->gen >= 7 ?
BRW_DATAPORT_READ_TARGET_DATA_CACHE :
BRW_DATAPORT_READ_TARGET_RENDER_CACHE;
const unsigned target_cache =
(devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE :
devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE :
BRW_DATAPORT_READ_TARGET_RENDER_CACHE);
{
brw_push_insn_state(p);
@ -2300,6 +2277,10 @@ void brw_oword_block_read(struct brw_codegen *p,
uint32_t bind_table_index)
{
const struct gen_device_info *devinfo = p->devinfo;
const unsigned target_cache =
(devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE :
devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_SAMPLER_CACHE :
BRW_DATAPORT_READ_TARGET_DATA_CACHE);
/* On newer hardware, offset is in units of owords. */
if (devinfo->gen >= 6)
@ -2340,7 +2321,7 @@ void brw_oword_block_read(struct brw_codegen *p,
bind_table_index,
BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW,
BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ,
BRW_DATAPORT_READ_TARGET_DATA_CACHE,
target_cache,
1, /* msg_length */
true, /* header_present */
1); /* response_length (1 reg, 2 owords!) */
@ -2361,6 +2342,9 @@ void brw_fb_WRITE(struct brw_codegen *p,
bool header_present)
{
const struct gen_device_info *devinfo = p->devinfo;
const unsigned target_cache =
(devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE :
BRW_DATAPORT_READ_TARGET_RENDER_CACHE);
brw_inst *insn;
unsigned msg_type;
struct brw_reg dest, src0;
@ -2397,6 +2381,7 @@ void brw_fb_WRITE(struct brw_codegen *p,
binding_table_index,
msg_control,
msg_type,
target_cache,
msg_length,
header_present,
last_render_target,
@ -2425,7 +2410,7 @@ gen9_fb_READ(struct brw_codegen *p,
brw_set_dp_read_message(p, insn, binding_table_index,
per_sample << 5 | msg_subtype,
GEN9_DATAPORT_RC_RENDER_TARGET_READ,
BRW_DATAPORT_READ_TARGET_RENDER_CACHE,
GEN6_SFID_DATAPORT_RENDER_CACHE,
msg_length, true /* header_present */,
response_length);
brw_inst_set_rt_slot_group(devinfo, insn,
@ -2888,6 +2873,11 @@ brw_svb_write(struct brw_codegen *p,
unsigned binding_table_index,
bool send_commit_msg)
{
const struct gen_device_info *devinfo = p->devinfo;
const unsigned target_cache =
(devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE :
devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE :
BRW_DATAPORT_READ_TARGET_RENDER_CACHE);
brw_inst *insn;
gen6_resolve_implied_move(p, &src0, msg_reg_nr);
@ -2900,6 +2890,7 @@ brw_svb_write(struct brw_codegen *p,
binding_table_index,
0, /* msg_control: ignored */
GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE,
target_cache,
1, /* msg_length */
true, /* header_present */
0, /* last_render_target: ignored */

15
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
View file

@ -1140,8 +1140,9 @@ generate_scratch_read(struct brw_codegen *p,
else
msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
const unsigned target_cache = devinfo->gen >= 7 ?
BRW_DATAPORT_READ_TARGET_DATA_CACHE :
const unsigned target_cache =
devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE :
devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE :
BRW_DATAPORT_READ_TARGET_RENDER_CACHE;
/* Each of the 8 channel enables is considered for whether each
@ -1169,6 +1170,10 @@ generate_scratch_write(struct brw_codegen *p,
struct brw_reg index)
{
const struct gen_device_info *devinfo = p->devinfo;
const unsigned target_cache =
(devinfo->gen >= 7 ? GEN7_SFID_DATAPORT_DATA_CACHE :
devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_RENDER_CACHE :
BRW_DATAPORT_READ_TARGET_RENDER_CACHE);
struct brw_reg header = brw_vec8_grf(0, 0);
bool write_commit;
@ -1228,6 +1233,7 @@ generate_scratch_write(struct brw_codegen *p,
brw_scratch_surface_idx(p),
BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
msg_type,
target_cache,
3, /* mlen */
true, /* header present */
false, /* not a render target write */
@ -1245,6 +1251,9 @@ generate_pull_constant_load(struct brw_codegen *p,
struct brw_reg offset)
{
const struct gen_device_info *devinfo = p->devinfo;
const unsigned target_cache =
(devinfo->gen >= 6 ? GEN6_SFID_DATAPORT_SAMPLER_CACHE :
BRW_DATAPORT_READ_TARGET_DATA_CACHE);
assert(index.file == BRW_IMMEDIATE_VALUE &&
index.type == BRW_REGISTER_TYPE_UD);
uint32_t surf_index = index.ud;
@ -1290,7 +1299,7 @@ generate_pull_constant_load(struct brw_codegen *p,
surf_index,
BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
msg_type,
BRW_DATAPORT_READ_TARGET_DATA_CACHE,
target_cache,
2, /* mlen */
true, /* header_present */
1 /* rlen */);