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gallium: change pipe_framebuffer_state width/height to 32-bit integer

Browse source 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38587>
This commit is contained in:
Marek Olšák 2025-12-03 11:40:16 -05:00 • committed by Marge Bot
parent bc1a6b0a41
commit 3c6477812e
20 changed files with 34 additions and 34 deletions
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4
src/gallium/auxiliary/util/u_framebuffer.c
View file

@ -155,7 +155,7 @@ util_framebuffer_min_size(const struct pipe_framebuffer_state *fb,
if (!fb->cbufs[i].texture)
continue;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&fb->cbufs[i], &width, &height);
w = MIN2(w, width);
@ -163,7 +163,7 @@ util_framebuffer_min_size(const struct pipe_framebuffer_state *fb,
}
if (fb->zsbuf.texture) {
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&fb->zsbuf, &width, &height);
w = MIN2(w, width);
h = MIN2(h, height);

8
src/gallium/auxiliary/util/u_inlines.h
View file

@ -356,7 +356,7 @@ pipe_surface_init(struct pipe_context *ctx, struct pipe_surface* ps,
static inline unsigned
pipe_surface_width(const struct pipe_surface *ps)
{
unsigned width = (uint16_t)u_minify(ps->texture->width0, ps->level);
unsigned width = u_minify(ps->texture->width0, ps->level);
/* adjust texture view size to get full blocksize on compressed formats */
if (!util_format_is_depth_or_stencil(ps->texture->format) && ps->format != ps->texture->format) {
@ -395,13 +395,13 @@ pipe_surface_height(const struct pipe_surface *ps)
}
static inline void
pipe_surface_size(const struct pipe_surface *ps, uint16_t *width, uint16_t *height)
pipe_surface_size(const struct pipe_surface *ps, unsigned *width, unsigned *height)
{
if (width)
*width = (uint16_t)pipe_surface_width(ps);
*width = pipe_surface_width(ps);
if (height)
*height = (uint16_t)pipe_surface_height(ps);
*height = pipe_surface_height(ps);
}
/* Return true if the surfaces are equal. */

4
src/gallium/auxiliary/util/u_threaded_context.h
View file

@ -655,8 +655,8 @@ struct threaded_context {
unsigned fb_layers;
#if TC_RESOLVE_STRICT
uint16_t fb_width;
uint16_t fb_height;
unsigned fb_width;
unsigned fb_height;
#endif
unsigned last, next, next_buf_list;

4
src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
View file

@ -2091,7 +2091,7 @@ d3d12_clear(struct pipe_context *pctx,
for (int i = 0; i < ctx->fb.nr_cbufs; ++i) {
if (buffers & (PIPE_CLEAR_COLOR0 << i)) {
struct pipe_surface *psurf = &ctx->fb.cbufs[i];
uint16_t width, height;
unsigned width, height;
pipe_surface_size(psurf, &width, &height);
d3d12_clear_render_target(pctx, psurf, color,
0, 0, width, height,
@ -2102,7 +2102,7 @@ d3d12_clear(struct pipe_context *pctx,
if (buffers & PIPE_CLEAR_DEPTHSTENCIL && ctx->fb.zsbuf.texture) {
struct pipe_surface *psurf = &ctx->fb.zsbuf;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(psurf, &width, &height);
d3d12_clear_depth_stencil(pctx, psurf,
buffers & PIPE_CLEAR_DEPTHSTENCIL,

2
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
View file

@ -301,7 +301,7 @@ fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
struct fd_resource *rsc = fd_resource(psurf[i].texture);
enum pipe_format format = fd_gmem_restore_format(psurf[i].format);
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&psurf[i], &width, &height);
/* The restore blit_zs shader expects stencil in sampler 0, and depth
* in sampler 1

2
src/gallium/drivers/freedreno/a4xx/fd4_emit.c
View file

@ -389,7 +389,7 @@ fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring, unsigned nr_bufs,
if (bufs[i].texture) {
struct fd_resource *rsc = fd_resource(bufs[i].texture);
enum pipe_format format = fd_gmem_restore_format(bufs[i].format);
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&bufs[i], &width, &height);
/* The restore blit_zs shader expects stencil in sampler 0,
* and depth in sampler 1

4
src/gallium/drivers/i915/i915_clear.c
View file

@ -231,7 +231,7 @@ i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
struct pipe_surface *ps = &framebuffer->cbufs[i];
if (ps->texture) {
uint16_t width, height;
unsigned width, height;
pipe_surface_size(ps, &width, &height);
pipe->clear_render_target(pipe, ps, color, 0, 0, width,
height, true);
@ -241,7 +241,7 @@ i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
struct pipe_surface *ps = &framebuffer->zsbuf;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(ps, &width, &height);
pipe->clear_depth_stencil(pipe, ps, buffers & PIPE_CLEAR_DEPTHSTENCIL,
depth, stencil, 0, 0, width, height,

2
src/gallium/drivers/lima/lima_blit.c
View file

@ -113,7 +113,7 @@ lima_pack_blit_cmd(struct lima_job *job,
}
}
uint16_t width, height;
unsigned width, height;
if (job->key.cbuf.texture)
pipe_surface_size(&job->key.cbuf, &width, &height);
else

2
src/gallium/drivers/lima/lima_job.c
View file

@ -66,7 +66,7 @@ lima_get_fb_info(struct lima_job *job)
fb->width = ctx->framebuffer.base.width;
fb->height = ctx->framebuffer.base.height;
} else {
uint16_t width, height;
unsigned width, height;
pipe_surface_size(psurf, &width, &height);
fb->width = width;
fb->height = height;

4
src/gallium/drivers/radeonsi/si_clear.c
View file

@ -1083,7 +1083,7 @@ static void si_fb_clear_via_compute(struct si_context *sctx, unsigned *buffers,
if (vi_dcc_enabled(tex, surf->level))
continue;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(surf, &width, &height);
/* Clears of thick and linear layouts are fastest with compute. */
if (tex->surface.thick_tiling ||
@ -1264,7 +1264,7 @@ static bool si_try_normal_clear(struct si_context *sctx, struct pipe_surface *ds
const union pipe_color_union *color,
float depth, unsigned stencil)
{
uint16_t surf_width, surf_height;
unsigned surf_width, surf_height;
pipe_surface_size(dst, &surf_width, &surf_height);
/* This is worth it only if it's a whole image clear. */
if (dstx == 0 && dsty == 0 &&

2
src/gallium/drivers/radeonsi/si_vpe.c
View file

@ -525,7 +525,7 @@ si_vpe_set_plane_info(struct vpe_video_processor *vpeproc,
return VPE_STATUS_NOT_SUPPORTED;
/* 1st plane ret setting */
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&surfaces[0], &width, &height);
plane_size->surface_size.x = 0;
plane_size->surface_size.y = 0;

4
src/gallium/drivers/svga/svga_pipe_misc.c
View file

@ -159,14 +159,14 @@ svga_set_framebuffer_state(struct pipe_context *pipe,
* different size, depending on the host API and driver,
*/
{
uint16_t width = 0, height = 0;
unsigned width = 0, height = 0;
if (fb->zsbuf.texture) {
pipe_surface_size(&fb->zsbuf, &width, &height);
}
for (unsigned i = 0; i < fb->nr_cbufs; ++i) {
if (fb->cbufs[i].texture) {
if (width && height) {
uint16_t cwidth, cheight;
unsigned cwidth, cheight;
pipe_surface_size(&fb->cbufs[i], &cwidth, &cheight);
if (cwidth != width ||
cheight != height) {

8
src/gallium/drivers/v3d/v3d_blit.c
View file

@ -572,9 +572,9 @@ v3d_tlb_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
* This should be fine because we only get here if the src and dst boxes
* match, so we know the blit involves the same tiles on both surfaces.
*/
uint16_t dst_width, dst_height;
unsigned dst_width, dst_height;
pipe_surface_size(&dst_surf, &dst_width, &dst_height);
uint16_t src_width, src_height;
unsigned src_width, src_height;
pipe_surface_size(&src_surf, &src_width, &src_height);
job->draw_width = MIN2(dst_width, src_width);
job->draw_height = MIN2(dst_height, src_height);
@ -838,7 +838,7 @@ v3d_sand8_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
* size now we are using a cpp=4 format. Next dimension take into
* account the UIF microtile layouts.
*/
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&dst_surf, &width, &height);
width = align(width, 8) / 2;
if (src->cpp == 1)
@ -1146,7 +1146,7 @@ v3d_sand30_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
* size now we are using a cpp=8 format. Next dimension take into
* account the UIF microtile layouts.
*/
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&dst_surf, &width, &height);
height /= 2;
width = align(width, 8);

2
src/gallium/drivers/vc4/vc4_blit.c
View file

@ -373,7 +373,7 @@ vc4_yuv_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
vc4_set_blit_surface(&dst_surf, pctx, info->dst.resource,
info->dst.level, info->dst.box.z);
dst_surf.format = PIPE_FORMAT_RGBA8888_UNORM;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&dst_surf, &width, &height);
width = align(width, 8) / 2;
if (dst->cpp == 1)

6
src/gallium/drivers/vc4/vc4_resource.c
View file

@ -777,7 +777,7 @@ vc4_dump_surface_non_msaa(struct pipe_surface *psurf)
struct vc4_resource *rsc = vc4_resource(prsc);
uint32_t *map = vc4_bo_map(rsc->bo);
uint32_t stride = rsc->slices[0].stride / 4;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(psurf, &width, &height);
uint32_t chunk_w = width / 79;
uint32_t chunk_h = height / 40;
@ -872,7 +872,7 @@ vc4_surface_msaa_get_sample(struct pipe_surface *psurf,
{
struct pipe_resource *prsc = psurf->texture;
struct vc4_resource *rsc = vc4_resource(prsc);
uint16_t width, height;
unsigned width, height;
pipe_surface_size(psurf, &width, &height);
uint32_t tile_w = 32, tile_h = 32;
uint32_t tiles_w = DIV_ROUND_UP(width, 32);
@ -946,7 +946,7 @@ static void
vc4_dump_surface_msaa(struct pipe_surface *psurf)
{
uint32_t tile_w = 32, tile_h = 32;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(psurf, &width, &height);
uint32_t tiles_w = DIV_ROUND_UP(width, tile_w);
uint32_t tiles_h = DIV_ROUND_UP(height, tile_h);

2
src/gallium/drivers/zink/zink_clear.c
View file

@ -419,7 +419,7 @@ static void
set_clear_fb(struct pipe_context *pctx, struct pipe_surface *psurf, struct pipe_surface *zsurf)
{
struct pipe_framebuffer_state fb_state = {0};
uint16_t width, height;
unsigned width, height;
if (psurf)
pipe_surface_size(psurf, &width, &height);
else

2
src/gallium/frontends/va/surface.c
View file

@ -980,7 +980,7 @@ vlVaHandleSurfaceAllocate(vlVaDriver *drv, vlVaSurface *surface,
if (i > !!surface->buffer->interlaced)
c.f[0] = c.f[1] = c.f[2] = c.f[3] = 0.5f;
uint16_t width, height;
unsigned width, height;
pipe_surface_size(&surfaces[i], &width, &height);
drv->pipe->clear_render_target(drv->pipe, &surfaces[i], &c, 0, 0,
width, height,

2
src/gallium/include/pipe/p_state.h
View file

@ -429,7 +429,7 @@ struct pipe_surface
*/
struct pipe_framebuffer_state
{
uint16_t width, height;
uint32_t width, height;
uint16_t layers; /**< Number of layers in a no-attachment framebuffer */
uint8_t samples; /**< Number of samples in a no-attachment framebuffer */

2
src/mesa/state_tracker/st_atom_framebuffer.c
View file

@ -61,7 +61,7 @@ static void
update_framebuffer_size(struct pipe_framebuffer_state *framebuffer,
struct pipe_surface *surface)
{
uint16_t width, height;
unsigned width, height;
assert(surface);
pipe_surface_size(surface, &width, &height);
assert(width < USHRT_MAX);

2
src/mesa/state_tracker/st_cb_texture.c
View file

@ -1794,7 +1794,7 @@ try_pbo_upload_common(struct gl_context *ctx,
pipe_sampler_view_release(sampler_view);
}
uint16_t width, height;
unsigned width, height;
pipe_surface_size(surface, &width, &height);
/* Framebuffer_state */