diff --git a/src/gallium/auxiliary/util/u_framebuffer.c b/src/gallium/auxiliary/util/u_framebuffer.c
index 3a12670d4b7..645cbbbf5f2 100644
--- a/src/gallium/auxiliary/util/u_framebuffer.c
+++ b/src/gallium/auxiliary/util/u_framebuffer.c
@@ -155,7 +155,7 @@ util_framebuffer_min_size(const struct pipe_framebuffer_state *fb,
       if (!fb->cbufs[i].texture)
          continue;
 
-      uint16_t width, height;
+      unsigned width, height;
       pipe_surface_size(&fb->cbufs[i], &width, &height);
 
       w = MIN2(w, width);
@@ -163,7 +163,7 @@ util_framebuffer_min_size(const struct pipe_framebuffer_state *fb,
    }
 
    if (fb->zsbuf.texture) {
-      uint16_t width, height;
+      unsigned width, height;
       pipe_surface_size(&fb->zsbuf, &width, &height);
       w = MIN2(w, width);
       h = MIN2(h, height);
diff --git a/src/gallium/auxiliary/util/u_inlines.h b/src/gallium/auxiliary/util/u_inlines.h
index ca14f24a910..fcad40ccde5 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -356,7 +356,7 @@ pipe_surface_init(struct pipe_context *ctx, struct pipe_surface* ps,
 static inline unsigned
 pipe_surface_width(const struct pipe_surface *ps)
 {
-   unsigned width = (uint16_t)u_minify(ps->texture->width0, ps->level);
+   unsigned width = u_minify(ps->texture->width0, ps->level);
 
    /* adjust texture view size to get full blocksize on compressed formats */
    if (!util_format_is_depth_or_stencil(ps->texture->format) && ps->format != ps->texture->format) {
@@ -395,13 +395,13 @@ pipe_surface_height(const struct pipe_surface *ps)
 }
 
 static inline void
-pipe_surface_size(const struct pipe_surface *ps, uint16_t *width, uint16_t *height)
+pipe_surface_size(const struct pipe_surface *ps, unsigned *width, unsigned *height)
 {
    if (width)
-      *width = (uint16_t)pipe_surface_width(ps);
+      *width = pipe_surface_width(ps);
 
    if (height)
-      *height = (uint16_t)pipe_surface_height(ps);
+      *height = pipe_surface_height(ps);
 }
 
 /* Return true if the surfaces are equal. */
diff --git a/src/gallium/auxiliary/util/u_threaded_context.h b/src/gallium/auxiliary/util/u_threaded_context.h
index f0c592d99ad..4f451db6d07 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.h
+++ b/src/gallium/auxiliary/util/u_threaded_context.h
@@ -655,8 +655,8 @@ struct threaded_context {
    unsigned fb_layers;
 
 #if TC_RESOLVE_STRICT
-   uint16_t fb_width;
-   uint16_t fb_height;
+   unsigned fb_width;
+   unsigned fb_height;
 #endif
 
    unsigned last, next, next_buf_list;
diff --git a/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp b/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
index 5e4bd47676f..595013926c4 100644
--- a/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
@@ -2091,7 +2091,7 @@ d3d12_clear(struct pipe_context *pctx,
       for (int i = 0; i < ctx->fb.nr_cbufs; ++i) {
          if (buffers & (PIPE_CLEAR_COLOR0 << i)) {
             struct pipe_surface *psurf = &ctx->fb.cbufs[i];
-            uint16_t width, height;
+            unsigned width, height;
             pipe_surface_size(psurf, &width, &height);
             d3d12_clear_render_target(pctx, psurf, color,
                                       0, 0, width, height,
@@ -2102,7 +2102,7 @@ d3d12_clear(struct pipe_context *pctx,
 
    if (buffers & PIPE_CLEAR_DEPTHSTENCIL && ctx->fb.zsbuf.texture) {
       struct pipe_surface *psurf = &ctx->fb.zsbuf;
-      uint16_t width, height;
+      unsigned width, height;
       pipe_surface_size(psurf, &width, &height);
       d3d12_clear_depth_stencil(pctx, psurf,
                                 buffers & PIPE_CLEAR_DEPTHSTENCIL,
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 55b0765da5a..590a7b818ed 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -301,7 +301,7 @@ fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
 
       struct fd_resource *rsc = fd_resource(psurf[i].texture);
       enum pipe_format format = fd_gmem_restore_format(psurf[i].format);
-      uint16_t width, height;
+      unsigned width, height;
       pipe_surface_size(&psurf[i], &width, &height);
       /* The restore blit_zs shader expects stencil in sampler 0, and depth
        * in sampler 1
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 007e6531e9f..85100fd73f7 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -389,7 +389,7 @@ fd4_emit_gmem_restore_tex(struct fd_ringbuffer *ring, unsigned nr_bufs,
       if (bufs[i].texture) {
          struct fd_resource *rsc = fd_resource(bufs[i].texture);
          enum pipe_format format = fd_gmem_restore_format(bufs[i].format);
-         uint16_t width, height;
+         unsigned width, height;
          pipe_surface_size(&bufs[i], &width, &height);
          /* The restore blit_zs shader expects stencil in sampler 0,
           * and depth in sampler 1
diff --git a/src/gallium/drivers/i915/i915_clear.c b/src/gallium/drivers/i915/i915_clear.c
index 6e46a8acc66..be098c82d60 100644
--- a/src/gallium/drivers/i915/i915_clear.c
+++ b/src/gallium/drivers/i915/i915_clear.c
@@ -231,7 +231,7 @@ i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
          struct pipe_surface *ps = &framebuffer->cbufs[i];
 
          if (ps->texture) {
-            uint16_t width, height;
+            unsigned width, height;
             pipe_surface_size(ps, &width, &height);
             pipe->clear_render_target(pipe, ps, color, 0, 0, width,
                                       height, true);
@@ -241,7 +241,7 @@ i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
 
    if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
       struct pipe_surface *ps = &framebuffer->zsbuf;
-      uint16_t width, height;
+      unsigned width, height;
       pipe_surface_size(ps, &width, &height);
       pipe->clear_depth_stencil(pipe, ps, buffers & PIPE_CLEAR_DEPTHSTENCIL,
                                 depth, stencil, 0, 0, width, height,
diff --git a/src/gallium/drivers/lima/lima_blit.c b/src/gallium/drivers/lima/lima_blit.c
index f0b418fd027..cece032e0a6 100644
--- a/src/gallium/drivers/lima/lima_blit.c
+++ b/src/gallium/drivers/lima/lima_blit.c
@@ -113,7 +113,7 @@ lima_pack_blit_cmd(struct lima_job *job,
       }
    }
 
-   uint16_t width, height;
+   unsigned width, height;
    if (job->key.cbuf.texture)
       pipe_surface_size(&job->key.cbuf, &width, &height);
    else
diff --git a/src/gallium/drivers/lima/lima_job.c b/src/gallium/drivers/lima/lima_job.c
index da2d4f125ad..8e803f7ad50 100644
--- a/src/gallium/drivers/lima/lima_job.c
+++ b/src/gallium/drivers/lima/lima_job.c
@@ -66,7 +66,7 @@ lima_get_fb_info(struct lima_job *job)
       fb->width = ctx->framebuffer.base.width;
       fb->height =  ctx->framebuffer.base.height;
    } else {
-      uint16_t width, height;
+      unsigned width, height;
       pipe_surface_size(psurf, &width, &height);
       fb->width = width;
       fb->height = height;
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 50550a8b922..3ec3c5c8d02 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -1083,7 +1083,7 @@ static void si_fb_clear_via_compute(struct si_context *sctx, unsigned *buffers,
       if (vi_dcc_enabled(tex, surf->level))
          continue;
 
-      uint16_t width, height;
+      unsigned width, height;
       pipe_surface_size(surf, &width, &height);
       /* Clears of thick and linear layouts are fastest with compute. */
       if (tex->surface.thick_tiling ||
@@ -1264,7 +1264,7 @@ static bool si_try_normal_clear(struct si_context *sctx, struct pipe_surface *ds
                                 const union pipe_color_union *color,
                                 float depth, unsigned stencil)
 {
-   uint16_t surf_width, surf_height;
+   unsigned surf_width, surf_height;
    pipe_surface_size(dst, &surf_width, &surf_height);
    /* This is worth it only if it's a whole image clear. */
    if (dstx == 0 && dsty == 0 &&
diff --git a/src/gallium/drivers/radeonsi/si_vpe.c b/src/gallium/drivers/radeonsi/si_vpe.c
index fcf64f2b3d1..b8415bab315 100644
--- a/src/gallium/drivers/radeonsi/si_vpe.c
+++ b/src/gallium/drivers/radeonsi/si_vpe.c
@@ -525,7 +525,7 @@ si_vpe_set_plane_info(struct vpe_video_processor *vpeproc,
       return VPE_STATUS_NOT_SUPPORTED;
 
    /* 1st plane ret setting */
-   uint16_t width, height;
+   unsigned width, height;
    pipe_surface_size(&surfaces[0], &width, &height);
    plane_size->surface_size.x         = 0;
    plane_size->surface_size.y         = 0;
diff --git a/src/gallium/drivers/svga/svga_pipe_misc.c b/src/gallium/drivers/svga/svga_pipe_misc.c
index 6208817fedd..5f26e11950d 100644
--- a/src/gallium/drivers/svga/svga_pipe_misc.c
+++ b/src/gallium/drivers/svga/svga_pipe_misc.c
@@ -159,14 +159,14 @@ svga_set_framebuffer_state(struct pipe_context *pipe,
     * different size, depending on the host API and driver,
     */
    {
-      uint16_t width = 0, height = 0;
+      unsigned width = 0, height = 0;
       if (fb->zsbuf.texture) {
          pipe_surface_size(&fb->zsbuf, &width, &height);
       }
       for (unsigned i = 0; i < fb->nr_cbufs; ++i) {
          if (fb->cbufs[i].texture) {
             if (width && height) {
-               uint16_t cwidth, cheight;
+               unsigned cwidth, cheight;
                pipe_surface_size(&fb->cbufs[i], &cwidth, &cheight);
                if (cwidth != width ||
                    cheight != height) {
diff --git a/src/gallium/drivers/v3d/v3d_blit.c b/src/gallium/drivers/v3d/v3d_blit.c
index 7a054d71d9d..e2a6e8a540c 100644
--- a/src/gallium/drivers/v3d/v3d_blit.c
+++ b/src/gallium/drivers/v3d/v3d_blit.c
@@ -572,9 +572,9 @@ v3d_tlb_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
          * This should be fine because we only get here if the src and dst boxes
          * match, so we know the blit involves the same tiles on both surfaces.
          */
-        uint16_t dst_width, dst_height;
+        unsigned dst_width, dst_height;
         pipe_surface_size(&dst_surf, &dst_width, &dst_height);
-        uint16_t src_width, src_height;
+        unsigned src_width, src_height;
         pipe_surface_size(&src_surf, &src_width, &src_height);
         job->draw_width = MIN2(dst_width, src_width);
         job->draw_height = MIN2(dst_height, src_height);
@@ -838,7 +838,7 @@ v3d_sand8_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
          * size now we are using a cpp=4 format. Next dimension take into
          * account the UIF microtile layouts.
          */
-        uint16_t width, height;
+        unsigned width, height;
         pipe_surface_size(&dst_surf, &width, &height);
         width = align(width, 8) / 2;
         if (src->cpp == 1)
@@ -1146,7 +1146,7 @@ v3d_sand30_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
          * size now we are using a cpp=8 format. Next dimension take into
          * account the UIF microtile layouts.
          */
-        uint16_t width, height;
+        unsigned width, height;
         pipe_surface_size(&dst_surf, &width, &height);
         height /= 2;
         width = align(width, 8);
diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c
index 505a16e8be2..d413bd53d92 100644
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -373,7 +373,7 @@ vc4_yuv_blit(struct pipe_context *pctx, struct pipe_blit_info *info)
         vc4_set_blit_surface(&dst_surf, pctx, info->dst.resource,
                              info->dst.level, info->dst.box.z);
         dst_surf.format = PIPE_FORMAT_RGBA8888_UNORM;
-        uint16_t width, height;
+        unsigned width, height;
         pipe_surface_size(&dst_surf, &width, &height);
         width = align(width, 8) / 2;
         if (dst->cpp == 1)
diff --git a/src/gallium/drivers/vc4/vc4_resource.c b/src/gallium/drivers/vc4/vc4_resource.c
index ff28cea00c2..64171e26aba 100644
--- a/src/gallium/drivers/vc4/vc4_resource.c
+++ b/src/gallium/drivers/vc4/vc4_resource.c
@@ -777,7 +777,7 @@ vc4_dump_surface_non_msaa(struct pipe_surface *psurf)
         struct vc4_resource *rsc = vc4_resource(prsc);
         uint32_t *map = vc4_bo_map(rsc->bo);
         uint32_t stride = rsc->slices[0].stride / 4;
-        uint16_t width, height;
+        unsigned width, height;
         pipe_surface_size(psurf, &width, &height);
         uint32_t chunk_w = width / 79;
         uint32_t chunk_h = height / 40;
@@ -872,7 +872,7 @@ vc4_surface_msaa_get_sample(struct pipe_surface *psurf,
 {
         struct pipe_resource *prsc = psurf->texture;
         struct vc4_resource *rsc = vc4_resource(prsc);
-        uint16_t width, height;
+        unsigned width, height;
         pipe_surface_size(psurf, &width, &height);
         uint32_t tile_w = 32, tile_h = 32;
         uint32_t tiles_w = DIV_ROUND_UP(width, 32);
@@ -946,7 +946,7 @@ static void
 vc4_dump_surface_msaa(struct pipe_surface *psurf)
 {
         uint32_t tile_w = 32, tile_h = 32;
-        uint16_t width, height;
+        unsigned width, height;
         pipe_surface_size(psurf, &width, &height);
         uint32_t tiles_w = DIV_ROUND_UP(width, tile_w);
         uint32_t tiles_h = DIV_ROUND_UP(height, tile_h);
diff --git a/src/gallium/drivers/zink/zink_clear.c b/src/gallium/drivers/zink/zink_clear.c
index a8c4449e1d3..5c9be56b6f7 100644
--- a/src/gallium/drivers/zink/zink_clear.c
+++ b/src/gallium/drivers/zink/zink_clear.c
@@ -419,7 +419,7 @@ static void
 set_clear_fb(struct pipe_context *pctx, struct pipe_surface *psurf, struct pipe_surface *zsurf)
 {
    struct pipe_framebuffer_state fb_state = {0};
-   uint16_t width, height;
+   unsigned width, height;
    if (psurf)
       pipe_surface_size(psurf, &width, &height);
    else
diff --git a/src/gallium/frontends/va/surface.c b/src/gallium/frontends/va/surface.c
index efe03f4ca08..d5293eb168f 100644
--- a/src/gallium/frontends/va/surface.c
+++ b/src/gallium/frontends/va/surface.c
@@ -980,7 +980,7 @@ vlVaHandleSurfaceAllocate(vlVaDriver *drv, vlVaSurface *surface,
          if (i > !!surface->buffer->interlaced)
             c.f[0] = c.f[1] = c.f[2] = c.f[3] = 0.5f;
 
-         uint16_t width, height;
+         unsigned width, height;
          pipe_surface_size(&surfaces[i], &width, &height);
          drv->pipe->clear_render_target(drv->pipe, &surfaces[i], &c, 0, 0,
                   width, height,
diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h
index 8979d8e1de1..a36d9972122 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -429,7 +429,7 @@ struct pipe_surface
  */
 struct pipe_framebuffer_state
 {
-   uint16_t width, height;
+   uint32_t width, height;
    uint16_t layers;  /**< Number of layers  in a no-attachment framebuffer */
    uint8_t samples; /**< Number of samples in a no-attachment framebuffer */
 
diff --git a/src/mesa/state_tracker/st_atom_framebuffer.c b/src/mesa/state_tracker/st_atom_framebuffer.c
index 710f2f92791..9543344cdc9 100644
--- a/src/mesa/state_tracker/st_atom_framebuffer.c
+++ b/src/mesa/state_tracker/st_atom_framebuffer.c
@@ -61,7 +61,7 @@ static void
 update_framebuffer_size(struct pipe_framebuffer_state *framebuffer,
                         struct pipe_surface *surface)
 {
-   uint16_t width, height;
+   unsigned width, height;
    assert(surface);
    pipe_surface_size(surface, &width, &height);
    assert(width  < USHRT_MAX);
diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c
index 4773350e3d3..c63681dbed4 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -1794,7 +1794,7 @@ try_pbo_upload_common(struct gl_context *ctx,
       pipe_sampler_view_release(sampler_view);
    }
 
-   uint16_t width, height;
+   unsigned width, height;
    pipe_surface_size(surface, &width, &height);
 
    /* Framebuffer_state */