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intel/fs: Don't unnecessarily fall back to indirect sends on Gen12

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The instruction encoding for SENDS changed on Gen12 and it now supports
embedding the entire extended message descriptor in the instruction if
it's an immediate.  Stop falling back to doing an indirect SEND just
because we had something in [15:12] of ex_desc.ud.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3547>
This commit is contained in:
Jason Ekstrand 2020-01-22 22:54:20 -06:00 • committed by Marge Bot
parent c70a786c77
commit 3b2eafbea9
1 changed files with 4 additions and 3 deletions
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7
src/intel/compiler/brw_eu_emit.c
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@ -2677,7 +2677,7 @@ brw_send_indirect_split_message(struct brw_codegen *p,
}
if (ex_desc.file == BRW_IMMEDIATE_VALUE &&
(ex_desc.ud & INTEL_MASK(15, 12)) == 0) {
(devinfo->gen >= 12 || (ex_desc.ud & INTEL_MASK(15, 12)) == 0)) {
ex_desc.ud |= ex_desc_imm;
} else {
const struct tgl_swsb swsb = brw_get_default_swsb(p);
@ -2703,8 +2703,9 @@ brw_send_indirect_split_message(struct brw_codegen *p,
unsigned imm_part = ex_desc_imm | sfid | eot << 5;
if (ex_desc.file == BRW_IMMEDIATE_VALUE) {
/* ex_desc bits 15:12 don't exist in the instruction encoding, so
* we may have fallen back to an indirect extended descriptor.
/* ex_desc bits 15:12 don't exist in the instruction encoding prior
* to Gen12, so we may have fallen back to an indirect extended
* descriptor.
*/
brw_MOV(p, addr, brw_imm_ud(ex_desc.ud | imm_part));
} else {