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jay: Clear default group for quad swizzles

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Quad swizzles should always execute with NoMask and group 0.

We skipped initializing the group, and so inherited whatever the state
from the previous instruction was.  This led to incorrect behavior if
the previous instruction was SIMD split:

   (16)        mov.u32 g84<2>, g2        |
   (16|M16)    mov.u32 g86<2>, g3        |
   (32|M16&W)  mov.u32 g2, g126.2<4,4,0> | I@1

Oops.  The final quad swizzle shouldn't have had M16 set.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40960>
This commit is contained in:
Kenneth Graunke 2026-04-13 12:39:50 -07:00 • committed by Marge Bot
parent 8bfb139033
commit 3a1227f36b
1 changed files with 5 additions and 7 deletions
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12
src/intel/compiler/jay/jay_to_binary.c
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@ -264,16 +264,10 @@ emit(struct brw_codegen *p,
brw_set_default_exec_size(p, util_logbase2(exec_size));
brw_set_default_mask_control(p, jay_is_no_mask(I));
brw_set_default_group(p, simd_offs * exec_size);
brw_set_default_swsb(p, dep);
brw_set_default_saturate(p, I->saturate);
/* Quad swizzle can get split down to SIMD4 even on Xe2 where we don't have
* NibCtrl. Fortunately, it's NoMask so it doesn't matter.
*/
if (I->op != JAY_OPCODE_QUAD_SWIZZLE) {
brw_set_default_group(p, simd_offs * exec_size);
}
/* Grab the hardware predicate, corresponding either to a logical predicate
* or SEL's selector.
*/
@ -419,6 +413,10 @@ emit(struct brw_codegen *p,
break;
case JAY_OPCODE_QUAD_SWIZZLE:
/* Quad swizzle can get split down to SIMD4 even on Xe2 where we don't
* have NibCtrl. Fortunately, it's NoMask so it doesn't matter.
*/
brw_set_default_group(p, 0);
brw_MOV(p, dst, quad_swizzle(SRC(0), I));
break;