From 3a1227f36b953be4ea9e96ac867cdcd08d93b222 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Mon, 13 Apr 2026 12:39:50 -0700 Subject: [PATCH] jay: Clear default group for quad swizzles Quad swizzles should always execute with NoMask and group 0. We skipped initializing the group, and so inherited whatever the state from the previous instruction was. This led to incorrect behavior if the previous instruction was SIMD split: (16) mov.u32 g84<2>, g2 | (16|M16) mov.u32 g86<2>, g3 | (32|M16&W) mov.u32 g2, g126.2<4,4,0> | I@1 Oops. The final quad swizzle shouldn't have had M16 set. Part-of: --- src/intel/compiler/jay/jay_to_binary.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/src/intel/compiler/jay/jay_to_binary.c b/src/intel/compiler/jay/jay_to_binary.c index 01ce1395bc6..1dbdf82e0fc 100644 --- a/src/intel/compiler/jay/jay_to_binary.c +++ b/src/intel/compiler/jay/jay_to_binary.c @@ -264,16 +264,10 @@ emit(struct brw_codegen *p, brw_set_default_exec_size(p, util_logbase2(exec_size)); brw_set_default_mask_control(p, jay_is_no_mask(I)); + brw_set_default_group(p, simd_offs * exec_size); brw_set_default_swsb(p, dep); brw_set_default_saturate(p, I->saturate); - /* Quad swizzle can get split down to SIMD4 even on Xe2 where we don't have - * NibCtrl. Fortunately, it's NoMask so it doesn't matter. - */ - if (I->op != JAY_OPCODE_QUAD_SWIZZLE) { - brw_set_default_group(p, simd_offs * exec_size); - } - /* Grab the hardware predicate, corresponding either to a logical predicate * or SEL's selector. */ @@ -419,6 +413,10 @@ emit(struct brw_codegen *p, break; case JAY_OPCODE_QUAD_SWIZZLE: + /* Quad swizzle can get split down to SIMD4 even on Xe2 where we don't + * have NibCtrl. Fortunately, it's NoMask so it doesn't matter. + */ + brw_set_default_group(p, 0); brw_MOV(p, dst, quad_swizzle(SRC(0), I)); break;