fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-02-10 18:20:27 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 9

radv: use correct VGT_TESS_DISTRIBUTION settings on GFX11

Browse source 
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19155>
This commit is contained in:
Samuel Pitoiset 2022-10-17 08:20:30 +00:00 • committed by Marge Bot
parent 2a7e4dc8cb
commit 39bdf17d19
1 changed files with 7 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
src/amd/vulkan/si_cmd_buffer.c
View file

@ -504,7 +504,13 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
}
}
if (physical_device->rad_info.gfx_level >= GFX9) {
if (physical_device->rad_info.gfx_level >= GFX11) {
/* ACCUM fields changed their meaning. */
radeon_set_context_reg(cs, R_028B50_VGT_TESS_DISTRIBUTION,
S_028B50_ACCUM_ISOLINE(255) | S_028B50_ACCUM_TRI(255) |
S_028B50_ACCUM_QUAD(255) | S_028B50_DONUT_SPLIT_GFX9(24) |
S_028B50_TRAP_SPLIT(6));
} else if (physical_device->rad_info.gfx_level >= GFX9) {
radeon_set_context_reg(cs, R_028B50_VGT_TESS_DISTRIBUTION,
S_028B50_ACCUM_ISOLINE(40) | S_028B50_ACCUM_TRI(30) |
S_028B50_ACCUM_QUAD(24) | S_028B50_DONUT_SPLIT_GFX9(24) |