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radv: Fix TCS -> TES I/O linking typo of VARYING_SLOT vs. BIT.

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In these bitwise expressions, VARYING_BIT_* should be used,
but the code mistakenly used VARYING_SLOT_* which is wrong.

Fixes: 0e481a4adc
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29327>
This commit is contained in:
Timur Kristóf 2024-05-22 15:24:53 +02:00 • committed by Marge Bot
parent 4b6f7613c0
commit 3963e4b53a
1 changed files with 1 additions and 1 deletions
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2
src/amd/vulkan/radv_pipeline_graphics.c
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@ -1380,7 +1380,7 @@ radv_link_tcs(const struct radv_device *device, struct radv_shader_stage *tcs_st
/* Count the number of per-vertex output slots we need to reserve for the TCS and TES. */
const uint64_t nir_mask = tcs_stage->nir->info.outputs_written & tes_stage->nir->info.inputs_read &
~(VARYING_SLOT_TESS_LEVEL_OUTER | VARYING_SLOT_TESS_LEVEL_INNER);
~(VARYING_BIT_TESS_LEVEL_OUTER | VARYING_BIT_TESS_LEVEL_INNER);
const uint64_t io_mask = radv_gather_unlinked_io_mask(nir_mask);
const unsigned num_reserved_outputs = util_last_bit64(io_mask);