From 3963e4b53aa73ef032709769585bdb1e3b6a8099 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timur=20Krist=C3=B3f?= Date: Wed, 22 May 2024 15:24:53 +0200 Subject: [PATCH] radv: Fix TCS -> TES I/O linking typo of VARYING_SLOT vs. BIT. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In these bitwise expressions, VARYING_BIT_* should be used, but the code mistakenly used VARYING_SLOT_* which is wrong. Fixes: 0e481a4adcd8006256c27d100a0a0f0c01a94171 Signed-off-by: Timur Kristóf Reviewed-by: Mike Blumenkrantz Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_pipeline_graphics.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index 19c0106b742..aaf086cefe2 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1380,7 +1380,7 @@ radv_link_tcs(const struct radv_device *device, struct radv_shader_stage *tcs_st /* Count the number of per-vertex output slots we need to reserve for the TCS and TES. */ const uint64_t nir_mask = tcs_stage->nir->info.outputs_written & tes_stage->nir->info.inputs_read & - ~(VARYING_SLOT_TESS_LEVEL_OUTER | VARYING_SLOT_TESS_LEVEL_INNER); + ~(VARYING_BIT_TESS_LEVEL_OUTER | VARYING_BIT_TESS_LEVEL_INNER); const uint64_t io_mask = radv_gather_unlinked_io_mask(nir_mask); const unsigned num_reserved_outputs = util_last_bit64(io_mask);