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i965/gen6+: Add load register immediate helper functions

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Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jordan Justen 2016-04-19 09:38:50 -07:00
parent 959e1e9e66
commit 357ff91359
2 changed files with 36 additions and 0 deletions
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4
src/mesa/drivers/dri/i965/brw_context.h
View file

@ -1452,6 +1452,10 @@ void brw_store_register_mem32(struct brw_context *brw,
drm_intel_bo *bo, uint32_t reg, uint32_t offset);
void brw_store_register_mem64(struct brw_context *brw,
drm_intel_bo *bo, uint32_t reg, uint32_t offset);
void brw_load_register_imm32(struct brw_context *brw,
uint32_t reg, uint32_t imm);
void brw_load_register_imm64(struct brw_context *brw,
uint32_t reg, uint64_t imm);
void brw_load_register_reg(struct brw_context *brw, uint32_t src,
uint32_t dest);
void brw_store_data_imm32(struct brw_context *brw, drm_intel_bo *bo,

32
src/mesa/drivers/dri/i965/intel_batchbuffer.c
View file

@ -601,6 +601,38 @@ brw_store_register_mem64(struct brw_context *brw,
}
}
/*
* Write a 32-bit register using immediate data.
*/
void
brw_load_register_imm32(struct brw_context *brw, uint32_t reg, uint32_t imm)
{
assert(brw->gen >= 6);
BEGIN_BATCH(3);
OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
OUT_BATCH(reg);
OUT_BATCH(imm);
ADVANCE_BATCH();
}
/*
* Write a 64-bit register using immediate data.
*/
void
brw_load_register_imm64(struct brw_context *brw, uint32_t reg, uint64_t imm)
{
assert(brw->gen >= 6);
BEGIN_BATCH(5);
OUT_BATCH(MI_LOAD_REGISTER_IMM | (5 - 2));
OUT_BATCH(reg);
OUT_BATCH(imm & 0xffffffff);
OUT_BATCH(reg + 4);
OUT_BATCH(imm >> 32);
ADVANCE_BATCH();
}
/*
* Copies a 32-bit register.
*/