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radeonsi: Flush L2 for render condition when CP can't use L2
If CP can't use L2 then it also can't read the render condition
through L2, so we need a flush, just like on GFX6-8.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
(cherry picked from commit 637f618ac5)
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parent
56d84fb02f
commit
3403c49ba5
2 changed files with 2 additions and 2 deletions
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@ -8644,7 +8644,7 @@
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"description": "radeonsi: Flush L2 for render condition when CP can't use L2",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": null,
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"notes": null
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@ -1696,7 +1696,7 @@ static void si_render_condition(struct pipe_context *ctx, struct pipe_query *que
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/* Settings this in the render cond atom is too late,
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* so set it here. */
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if (sctx->gfx_level <= GFX8) {
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if (sctx->gfx_level <= GFX8 || sctx->screen->info.cp_sdma_ge_use_system_memory_scope) {
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sctx->barrier_flags |= SI_BARRIER_WB_L2 | SI_BARRIER_PFP_SYNC_ME;
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si_mark_atom_dirty(sctx, &sctx->atoms.s.barrier);
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}
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