radeonsi: only emit line stippling and provoking vertex state when it changes

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2014-12-08 13:35:36 +01:00
parent acda2e113a
commit 3291eedfe6
5 changed files with 9 additions and 0 deletions

View file

@ -161,4 +161,5 @@ void si_begin_new_cs(struct si_context *ctx)
ctx->last_gs_out_prim = -1;
ctx->last_prim = -1;
ctx->last_multi_vgt_param = -1;
ctx->last_rast_prim = -1;
}

View file

@ -185,6 +185,7 @@ struct si_context {
int last_gs_out_prim;
int last_prim;
int last_multi_vgt_param;
int last_rast_prim;
};
/* si_blit.c */

View file

@ -711,6 +711,7 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
si_update_fb_rs_state(sctx);
sctx->clip_regs.dirty = true;
sctx->last_rast_prim = -1; /* reset this so that it gets updated */
}
static void si_delete_rs_state(struct pipe_context *ctx, void *state)

View file

@ -156,6 +156,9 @@ static void si_emit_rasterizer_prim_state(struct si_context *sctx, unsigned mode
if (sctx->gs_shader)
mode = sctx->gs_shader->gs_output_prim;
if (mode == sctx->last_rast_prim)
return;
r600_write_context_reg(cs, R_028A0C_PA_SC_LINE_STIPPLE,
sctx->pa_sc_line_stipple |
S_028A0C_AUTO_RESET_CNTL(mode == PIPE_PRIM_LINES ? 1 :
@ -166,6 +169,8 @@ static void si_emit_rasterizer_prim_state(struct si_context *sctx, unsigned mode
S_028814_PROVOKING_VTX_LAST(mode == PIPE_PRIM_QUADS ||
mode == PIPE_PRIM_QUAD_STRIP ||
mode == PIPE_PRIM_POLYGON));
sctx->last_rast_prim = mode;
}
static void si_emit_draw_registers(struct si_context *sctx,

View file

@ -512,6 +512,7 @@ static void si_bind_gs_shader(struct pipe_context *ctx, void *state)
sctx->gs_shader = sel;
sctx->clip_regs.dirty = true;
sctx->last_rast_prim = -1; /* reset this so that it gets updated */
}
static void si_make_dummy_ps(struct si_context *sctx)