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aco/ra: allow m0 in get_reg_specified()

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Totals from 1 (0.00% of 136546) affected shaders (Navi10):
CodeSize: 12788 -> 12776 (-0.09%)
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Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9763>
This commit is contained in:
Daniel Schürmann 2021-03-22 19:27:32 +00:00 • committed by Marge Bot
parent 4bfbd4de84
commit 3284f755a3
1 changed files with 2 additions and 1 deletions
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3
src/amd/compiler/aco_register_allocation.cpp
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@ -1204,7 +1204,8 @@ bool get_reg_specified(ra_ctx& ctx,
PhysRegInterval vcc_win = { vcc, 2 };
/* VCC is outside the bounds */
bool is_vcc = rc.type() == RegType::sgpr && vcc_win.contains(reg_win);
if (!bounds.contains(reg_win) && !is_vcc)
bool is_m0 = rc == s1 && reg == m0;
if (!bounds.contains(reg_win) && !is_vcc && !is_m0)
return false;
if (rc.is_subdword()) {