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intel/isl: Fix DecompressInL3 assignment on gfx12.5

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* In the ACM PRMs, the programming notes under
  RENDER_SURFACE_STATE::MemoryCompressionEnable state that the
  DecompressInL3 bit must be set for media compression.

* Unlike TGL, ACM seems to handle format reinterpretation just fine
  without using the bit.

Update the assignment accordingly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32192>
This commit is contained in:
Nanley Chery 2024-11-15 16:54:41 -05:00 • committed by Marge Bot
parent 7e9ea5c1b5
commit 2dedd8dbb2
1 changed files with 8 additions and 1 deletions
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9
src/intel/isl/isl_surface_state.c
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@ -763,7 +763,14 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
#endif
#if GFX_VER == 12
s.MemoryCompressionEnable = info->aux_usage == ISL_AUX_USAGE_MC;
#endif
#if GFX_VERx10 == 125
/* In the ACM PRMs, the programming notes under
* RENDER_SURFACE_STATE::MemoryCompressionEnable state that the
* following bit must be set for media compression.
*/
s.DecompressInL3 = info->aux_usage == ISL_AUX_USAGE_MC;
#elif GFX_VERx10 == 120
/* The Tiger Lake PRM for RENDER_SURFACE_STATE::DecompressInL3 says:
*
* When this field is set to 1h, the associated compressible surface,