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radeonsi,radv: fix a late alloc deadlock with <= 6 CUs per SA

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We should always prevent 1 CU from executing VS and GS waves
to prevent a deadlock.

Fixes: c377f45c18 "radeonsi/gfx10: rewrite late alloc computation"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
(cherry picked from commit 66f254b4e6)
This commit is contained in:
Marek Olšák 2021-07-06 23:06:43 -04:00 • committed by Eric Engestrom
parent 3230edbc0e
commit 2c5ef8cfd3
4 changed files with 1 additions and 7 deletions
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2
.pick_status.json
View file

@ -1381,7 +1381,7 @@
"description": "radeonsi,radv: fix a late alloc deadlock with <= 6 CUs per SA",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "c377f45c1833052f3d0d9d4ac341ee9917f9184c"
},

2
src/amd/vulkan/si_cmd_buffer.c
View file

@ -337,8 +337,6 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs)
*/
if (!physical_device->rad_info.use_late_alloc) {
late_alloc_wave64 = 0;
} else if (num_cu_per_sh <= 6) {
late_alloc_wave64 = num_cu_per_sh - 2;
} else {
late_alloc_wave64 = (num_cu_per_sh - 2) * 4;

2
src/gallium/drivers/radeonsi/si_state.c
View file

@ -5251,8 +5251,6 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing)
*/
if (!sscreen->info.use_late_alloc) {
late_alloc_wave64 = 0;
} else if (num_cu_per_sh <= 6) {
late_alloc_wave64 = num_cu_per_sh - 2;
} else {
late_alloc_wave64 = (num_cu_per_sh - 2) * 4;

2
src/gallium/drivers/radeonsi/si_state_shaders.c
View file

@ -1216,8 +1216,6 @@ static void gfx10_shader_ngg(struct si_screen *sscreen, struct si_shader *shader
*/
if (sscreen->info.family == CHIP_NAVI14 || !sscreen->info.use_late_alloc)
late_alloc_wave64 = 0;
else if (num_cu_per_sh <= 6)
late_alloc_wave64 = num_cu_per_sh - 2; /* All CUs enabled */
else if (shader->key.opt.ngg_culling)
late_alloc_wave64 = num_cu_per_sh * 10;
else