From 2c5ef8cfd3755768c5f253e8f50569f060c7602b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 6 Jul 2021 23:06:43 -0400 Subject: [PATCH] radeonsi,radv: fix a late alloc deadlock with <= 6 CUs per SA We should always prevent 1 CU from executing VS and GS waves to prevent a deadlock. Fixes: c377f45c1833052 "radeonsi/gfx10: rewrite late alloc computation" Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: (cherry picked from commit 66f254b4e6ca604c9e866248659dbd1d4a6de0b4) --- .pick_status.json | 2 +- src/amd/vulkan/si_cmd_buffer.c | 2 -- src/gallium/drivers/radeonsi/si_state.c | 2 -- src/gallium/drivers/radeonsi/si_state_shaders.c | 2 -- 4 files changed, 1 insertion(+), 7 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 7703fe0308b..c45612ddf1e 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1381,7 +1381,7 @@ "description": "radeonsi,radv: fix a late alloc deadlock with <= 6 CUs per SA", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "c377f45c1833052f3d0d9d4ac341ee9917f9184c" }, diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 19dbc313adc..7c67c6a5875 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -337,8 +337,6 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs) */ if (!physical_device->rad_info.use_late_alloc) { late_alloc_wave64 = 0; - } else if (num_cu_per_sh <= 6) { - late_alloc_wave64 = num_cu_per_sh - 2; } else { late_alloc_wave64 = (num_cu_per_sh - 2) * 4; diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 869cc0417df..46898d2d843 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -5251,8 +5251,6 @@ void si_init_cs_preamble_state(struct si_context *sctx, bool uses_reg_shadowing) */ if (!sscreen->info.use_late_alloc) { late_alloc_wave64 = 0; - } else if (num_cu_per_sh <= 6) { - late_alloc_wave64 = num_cu_per_sh - 2; } else { late_alloc_wave64 = (num_cu_per_sh - 2) * 4; diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index edb5d306014..addea7a61d0 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -1216,8 +1216,6 @@ static void gfx10_shader_ngg(struct si_screen *sscreen, struct si_shader *shader */ if (sscreen->info.family == CHIP_NAVI14 || !sscreen->info.use_late_alloc) late_alloc_wave64 = 0; - else if (num_cu_per_sh <= 6) - late_alloc_wave64 = num_cu_per_sh - 2; /* All CUs enabled */ else if (shader->key.opt.ngg_culling) late_alloc_wave64 = num_cu_per_sh * 10; else