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freedreno/devices: Fix magic regs for Adreno A32
Now that I got a hands on access to this GPU and could run deqp-vk, it uses blob v676.0 and the values are different from v744.19. Not only they are different, with the values from v744 there are CTS test faulures. Fixes at least ASTC tests. Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29786>
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1 changed files with 6 additions and 6 deletions
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@ -1037,7 +1037,7 @@ add_gpus([
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],
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))
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# Values from blob v744.19
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# Values from blob v676.0
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add_gpus([
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GPUId(chip_id=0x43050a00, name="FDA32"), # Adreno A32 (G3x Gen 2)
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GPUId(chip_id=0xffff43050a00, name="FDA32"),
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@ -1053,7 +1053,7 @@ add_gpus([
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fibers_per_sp = 128 * 2 * 16,
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magic_regs = dict(
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# PC_POWER_CNTL = 7,
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TPL1_DBG_ECO_CNTL = 0x13100000,
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TPL1_DBG_ECO_CNTL = 0x11100000,
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GRAS_DBG_ECO_CNTL = 0x00004800,
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SP_CHICKEN_BITS = 0x10001400,
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UCHE_CLIENT_PF = 0x00000084,
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@ -1064,17 +1064,17 @@ add_gpus([
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RB_DBG_ECO_CNTL = 0x00000000,
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RB_DBG_ECO_CNTL_blit = 0x00000000, # is it even needed?
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# HLSQ_DBG_ECO_CNTL = 0x0,
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RB_UNKNOWN_8E01 = 0x0,
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RB_UNKNOWN_8E01 = 0x00000000,
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VPC_DBG_ECO_CNTL = 0x02000000,
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UCHE_UNKNOWN_0E12 = 0x40000000,
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UCHE_UNKNOWN_0E12 = 0x00000000,
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RB_UNKNOWN_8E06 = 0x02080000,
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),
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raw_magic_regs = [
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[A6XXRegs.REG_A6XX_UCHE_CACHE_WAYS, 0x00040004],
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[A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00040700],
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[A6XXRegs.REG_A6XX_TPL1_DBG_ECO_CNTL1, 0x00000700],
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[A6XXRegs.REG_A7XX_SP_UNKNOWN_AE08, 0x00400400],
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[A6XXRegs.REG_A7XX_SP_UNKNOWN_AE08, 0x00000400],
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[A6XXRegs.REG_A7XX_SP_UNKNOWN_AE09, 0x00430820],
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[A6XXRegs.REG_A7XX_SP_UNKNOWN_AE0A, 0x00000000],
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[A6XXRegs.REG_A7XX_UCHE_UNKNOWN_0E10, 0x00000000],
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