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nir/lower_vec_to_movs: Get rid of start_idx and swizzle compacting

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Previously, we did this thing with keeping track of a separate start_idx
which was different from the iteration variable.  I think this was a relic
of the way that GLSL IR implements writemasks.  In NIR, if a given bit in
the writemask is unset then that channel is just "unused", not missing.  In
particular, a vec4 operation with a writemask of 0xd will use sources 0, 2,
and 3 and leave source 1 alone.  We can simplify things a good deal (and
make them correct) by removing this "compacting" step.

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Jason Ekstrand 2015-09-09 14:47:28 -07:00
parent c951bb8305
commit 2b2f1f16a0
1 changed files with 13 additions and 20 deletions
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33
src/glsl/nir/nir_lower_vec_to_movs.c
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@ -53,29 +53,25 @@ src_matches_dest_reg(nir_dest *dest, nir_src *src)
* which ones have been processed. * which ones have been processed.
*/ */
static unsigned static unsigned
insert_mov(nir_alu_instr *vec, unsigned start_channel, insert_mov(nir_alu_instr *vec, unsigned start_idx, nir_shader *shader)
unsigned start_src_idx, nir_shader *shader)
{ {
unsigned src_idx = start_src_idx; assert(start_idx < nir_op_infos[vec->op].num_inputs);
assert(src_idx < nir_op_infos[vec->op].num_inputs);
nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov); nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_imov);
nir_alu_src_copy(&mov->src[0], &vec->src[src_idx], mov); nir_alu_src_copy(&mov->src[0], &vec->src[start_idx], mov);
nir_alu_dest_copy(&mov->dest, &vec->dest, mov); nir_alu_dest_copy(&mov->dest, &vec->dest, mov);
mov->dest.write_mask = (1u << start_channel); mov->dest.write_mask = (1u << start_idx);
mov->src[0].swizzle[start_channel] = vec->src[src_idx].swizzle[0]; mov->src[0].swizzle[start_idx] = vec->src[start_idx].swizzle[0];
src_idx++;
for (unsigned i = start_channel + 1; i < 4; i++) { for (unsigned i = start_idx + 1; i < 4; i++) {
if (!(vec->dest.write_mask & (1 << i))) if (!(vec->dest.write_mask & (1 << i)))
continue; continue;
if (nir_srcs_equal(vec->src[src_idx].src, vec->src[start_src_idx].src)) { if (nir_srcs_equal(vec->src[i].src, vec->src[start_idx].src)) {
mov->dest.write_mask |= (1 << i); mov->dest.write_mask |= (1 << i);
mov->src[0].swizzle[i] = vec->src[src_idx].swizzle[0]; mov->src[0].swizzle[i] = vec->src[i].swizzle[0];
} }
src_idx++;
} }
nir_instr_insert_before(&vec->instr, &mov->instr); nir_instr_insert_before(&vec->instr, &mov->instr);
@ -121,26 +117,23 @@ lower_vec_to_movs_block(nir_block *block, void *void_impl)
* destination reg, in case other values we're populating in the dest * destination reg, in case other values we're populating in the dest
* might overwrite them. * might overwrite them.
*/ */
for (unsigned i = 0, src_idx = 0; i < 4; i++) { for (unsigned i = 0; i < 4; i++) {
if (!(vec->dest.write_mask & (1 << i))) if (!(vec->dest.write_mask & (1 << i)))
continue; continue;
if (src_matches_dest_reg(&vec->dest.dest, &vec->src[src_idx].src)) { if (src_matches_dest_reg(&vec->dest.dest, &vec->src[i].src)) {
finished_write_mask |= insert_mov(vec, i, src_idx, shader); finished_write_mask |= insert_mov(vec, i, shader);
break; break;
} }
src_idx++;
} }
/* Now, emit MOVs for all the other src channels. */ /* Now, emit MOVs for all the other src channels. */
for (unsigned i = 0, src_idx = 0; i < 4; i++) { for (unsigned i = 0; i < 4; i++) {
if (!(vec->dest.write_mask & (1 << i))) if (!(vec->dest.write_mask & (1 << i)))
continue; continue;
if (!(finished_write_mask & (1 << i))) if (!(finished_write_mask & (1 << i)))
finished_write_mask |= insert_mov(vec, i, src_idx, shader); finished_write_mask |= insert_mov(vec, i, shader);
src_idx++;
} }
nir_instr_remove(&vec->instr); nir_instr_remove(&vec->instr);